Redundant ADC Verification Architecture for Dead-Time-Free Input Checks

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Solution Overview

Problem

In industrial automation systems, safety analog input modules with redundant circuit architecture face challenges in verifying input data accuracy due to noise interference and diagnostic operations causing dead times and unsynchronization of signals, which can lead to errors and reduced system availability.

Innovation Solution

A system and method that utilize two analog-to-digital converters to receive and convert analog signals into digital signals, with a control system performing diagnostic operations on each converter at different time periods to avoid dead times and ensure synchronization, generating a fourth signal based on complement data from both converters to maintain accurate and redundant fail-safe data processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If diagnostic operations are performed on redundant converters simultaneously, then system reliability is improved through comprehensive testing, but dead time increases and system availability deteriorates

Engineering Contradiction:
Improvesystem reliabilityVSAvoiddead time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements periodic diagnostic operations where each redundant converter is tested alternately in time-separated intervals. The control system schedules diagnostic operations for first converter during first time intervals and second converter during second time intervals, creating a periodic testing pattern that ensures comprehensive reliability checking while maintaining continuous operational output through complement data switching.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The control system prepares complement data from the non-tested converter in advance before the tested converter becomes unavailable. This preliminary preparation of backup data ensures that when a converter undergoes diagnostic testing, the system can immediately switch to pre-prepared complement data without interruption, eliminating dead time.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If diagnostic operations are performed on redundant converters alternately, then system availability is improved by maintaining continuous output, but signal synchronization becomes complex

Engineering Contradiction:
Improvesystem availabilityVSAvoidsignal synchronization complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces complex mechanical or hardware-based synchronization mechanisms with software-controlled timing and data switching logic. The control system uses programmed time interval management and data routing to achieve synchronization, substituting physical synchronization hardware with flexible software-based temporal coordination that simplifies the overall system architecture.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The control system acts as an intermediary that manages the alternating diagnostic operations and coordinates the switching between primary and complement data. This intermediary function handles the complexity of synchronization by centralizing the coordination logic, managing time intervals, and routing data flows, thereby simplifying the interaction between redundant converters.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If noise interference is reduced through filtering, then data accuracy is improved, but signal processing time increases

Engineering Contradiction:
Improvedata accuracyVSAvoidsignal processing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system performs noise filtering and data validation operations in advance on complement data while the primary converter is operational. This preliminary processing ensures that when switching to complement data during diagnostic operations, the data is already cleaned and validated, eliminating the need for time-consuming filtering during critical switching moments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent maintains continuous useful action by overlapping data processing operations with converter operational cycles. Filtering and validation of complement data occur during periods when primary converter data is being used, ensuring that noise reduction processing is continuously performed without adding to the overall system response time.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20240160201A1Complementary architecture for verifying input data in redundant modules
Publication Date: 2024.05.16 ROCKWELL AUTOMATION ASIA PACIFIC BUSINESS CTR PTE
  • US20240160201A1 patent drawing
  • US20240160201A1 patent drawing
  • US20240160201A1 patent drawing

AI summary

A system includes a first converter configured to receive a first signal and convert the first signal into a second signal. The system also includes a second converter configured to receive the first signal and convert the first signal into a third signal. The system also includes a control system configured to perform a verification operation on the second signal based on the third signal. The control system is also configured to perform a first diagnostic operation on the first converter during a first duration of time. The control system is also configured to perform a second diagnostic operation on the second converter during a second duration of time. The first duration of time and the second duration of time occur at different time periods. The control system is also configured to receive first complement data from the second converter during the first duration of time. The control system is also configured to receive second complement data from the first converter during the second duration of time. The control system is also configured to generate a fourth signal based on the second signal, the third signal, the first complement data, and the second complement data.