Redundant Reference Clock Selection Against Glitch and RFI Attacks
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Solution Overview
Problem
The vulnerability of processor reference clocks to glitch attacks and radio frequency interference (RFI) due to exposed physical traces, which can compromise the functional safety and security of computing systems.
Innovation Solution
Implementing an array of integrated and spatially distributed micromechanical resonator oscillators to generate redundant reference clocks, with frequency comparators and a multiplexer to select a stable clock and mitigate unauthorized manipulation and RFI interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single external crystal oscillator is used to generate the reference clock, then the device complexity is low, but the reliability is compromised due to vulnerability to glitch attacks and RFI
Solution Approach 1:
The patent divides the single oscillator function into multiple spatially distributed oscillators (first oscillator, second oscillator, third oscillator, etc.) that generate separate clock signals. This segmentation allows the system to detect and isolate compromised oscillators while maintaining operation from trusted oscillators, thereby improving reliability without requiring a completely new system architecture.
Solution Approach 2:
The patent creates multiple copies of the oscillator function with identical or similar characteristics. These copied oscillators are distributed spatially and generate redundant clock signals that can be compared. If one copy is compromised by glitch attacks or RFI, the other copies provide backup, ensuring clock integrity while adding minimal complexity compared to a single oscillator design.
2Reliability
If physical traces are exposed for clock distribution, then the ease of operation is improved, but the security is compromised due to susceptibility to unauthorized manipulation
Solution Approach 1:
The patent applies different security measures to different parts of the clock distribution system. Each oscillator is spatially distributed and can be independently monitored and protected. The frequency comparison mechanism provides localized detection at each oscillator node, allowing security measures to be applied selectively without requiring complete system-wide redesign, thus maintaining ease of operation while improving security.
Solution Approach 2:
The patent introduces frequency comparators as intermediary devices between the oscillators and the processor. These comparators act as mediators that monitor the clock signals for unauthorized manipulation without requiring direct exposure of the physical traces. The multiplexer serves as another intermediary that selectively routes trusted clock signals, protecting the distribution traces while maintaining operational simplicity.
3Reliability
If multiple oscillators are used to provide redundancy, then the reliability is improved, but the device complexity increases due to frequency comparison circuitry
Solution Approach 1:
The frequency comparators perform multiple functions: they compare frequencies to detect glitches, identify trusted oscillators, and enable the multiplexer to select appropriate clock signals. This multi-functionality reduces the need for separate dedicated circuits for each task, thereby limiting the increase in device complexity while achieving the desired redundancy and reliability improvements.
Solution Approach 2:
The patent combines the frequency comparison, trust determination, and clock selection functions into an integrated system where the comparators and multiplexer work together as a unified mechanism. By merging these functions rather than implementing them as separate independent systems, the patent reduces overall complexity while maintaining the redundancy benefits of multiple oscillators.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution eliminates vulnerability to glitch attacks, provides redundancy against sophisticated attacks, and increases RFI resiliency, ensuring the integrity and security of the processor's reference clock.
Implementation Method 1
an array of integrated and spatially distributed micromechanical resonator oscillators to detect and provide redundancy and fail-safe mechanism against glitch attacks
Data Source
AI summary
An apparatus and method to protect unauthorized change to a reference clock for a processor. The apparatus comprises: a first oscillator to generate a first clock; a second oscillator to generate a second clock; a third oscillator to generate a third clock; a first counter to count frequency of the first clock with respect to a fourth clock; a second counter to count frequency of the second clock with respect to the fourth clock; a third counter to count frequency of the third clock with respect to the fourth clock; and a circuitry to compare frequencies of the first, second, and third clocks with one another. The oscillators can be embedded in an interposer or package. These oscillators include one or more of: LC oscillator, micro electro-mechanical system (MEMs) based resonator, or ring oscillator.