Redundant Clock Synchronization with Asynchronous Leader Failover

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Solution Overview

Problem

Fault-tolerant computing systems face challenges in maintaining synchronized clocks across redundant computers, especially in detecting and responding to clock failures, which can lead to system instability and errors.

Innovation Solution

A computing system architecture that includes oscillators, counters, and processing components to maintain synchronized clocks by determining time differentials and offset values between computers, allowing for automatic re-synchronization with alternate leaders in case of failure, ensuring robust clock synchronization and fault tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single leader clock is used for synchronization, then the system can maintain simple clock synchronization, but the system becomes vulnerable to failures and lacks redundancy

Engineering Contradiction:

Improvesystem reliabilityVSAvoidsynchronization complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The system pre-establishes multiple potential leader clocks and maintains synchronization information with all of them in advance. When a failure occurs, the system can immediately switch to an alternate leader without requiring complex re-synchronization protocols, thus improving reliability while keeping the synchronization mechanism relatively simple

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements redundant leader clocks that serve as backup synchronization sources. This cushioning against failure allows the system to maintain operation even when the primary leader clock fails, enhancing reliability without significantly increasing the complexity of the synchronization protocol

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If multiple redundant computing systems are implemented, then fault tolerance is improved, but detecting and responding to clock failures becomes more difficult

Engineering Contradiction:

Improvefault toleranceVSAvoidfailure detection difficulty

Core Design Contradiction:

ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The system implements a feedback mechanism where each computing system continuously monitors time differentials from other systems and communicates these measurements back to the group. This feedback loop enables automatic detection of clock failures through inconsistent time differential readings, making failure detection straightforward even in redundant systems

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The system uses time differential measurements as a preliminary check to identify potential clock failures before they cause system-wide issues. By continuously monitoring these differentials and comparing them against expected values, the system can detect and respond to clock anomalies proactively

Inventive Principle:

Principle #9Preliminary anti-action

3Reliability

If automatic re-synchronization with alternate leaders is implemented, then system resilience is enhanced, but the complexity of clock management increases

Engineering Contradiction:

Improvesystem resilienceVSAvoidclock management complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The computing systems automatically perform re-synchronization with alternate leaders when failures are detected, without requiring manual intervention or complex external management. The systems self-manage the clock synchronization by selecting appropriate leaders and adjusting their clocks based on time differential measurements

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS11209858B2Multi-device asynchronous timing exchange for redundant clock synchronization

Publication Date: 2021.12.28 THE CHARLES STARK DRAPER LABORATORY INC

AI summary

The present disclosure relates to systems and methods to maintain clock synchronization of multiple computers, or computer systems, through the exchange of communication messages that include clock and/or timing information.