Redundant Process Controller Data Synchronization via Logic Gates

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Solution Overview

Problem

In redundant process control systems, data synchronization between primary and secondary process controllers is challenging due to hardware and timing differences, leading to potential control path discrepancies and costly downtime if not properly synchronized.

Innovation Solution

The implementation of logic gates (AND, OR, XOR) for data synchronization and calculation without conditional branching, ensuring deterministic throughput by organizing data in a specific manner within the processor's memory, allowing for synchronized scan values, output status, override flags, and control values between redundant process controllers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional data synchronization methods are used between redundant process controllers, then hardware and timing differences cause data discrepancies, but implementing synchronization mechanisms increases system complexity and may introduce additional failure points

Engineering Contradiction:
Improvedata synchronization reliabilityVSAvoidsynchronization system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a copy of the entire process control data structure from the primary controller to the secondary controller through a unidirectional data transfer mechanism. This copying approach ensures both controllers have identical process data (PV, SP, MV, DO, AO values) without requiring complex bidirectional synchronization protocols, thereby maintaining reliability while minimizing added complexity

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The data synchronization is segmented into distinct data structures (process data, control data, status data) that are independently managed and transferred. This segmentation allows the system to synchronize only necessary data elements and facilitates fault isolation, reducing the overall complexity of the synchronization system while maintaining reliability

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If conditional branching is used in the control logic to handle data synchronization, then flexibility is improved, but deterministic throughput is reduced due to variable execution times

Engineering Contradiction:
Improvecontrol logic flexibilityVSAvoiddeterministic throughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent changes the control logic from conditional branching to a parameter-based approach where data validity is determined by status flags and data structures rather than if-then-else statements. This allows the control logic to adapt to different conditions while maintaining a fixed execution path, preserving deterministic throughput while retaining necessary flexibility

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical/structural approach of conditional branching with a data-driven approach using structured data elements and status flags. This substitution eliminates variable execution paths caused by conditional logic while maintaining the ability to handle different operational conditions through data structure design, thereby preserving deterministic throughput

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If scan values from redundant IO channels are allowed to differ due to hardware and timing differences, then hardware tolerance is improved, but control path consistency deteriorates

Engineering Contradiction:
Improvehardware toleranceVSAvoidcontrol path consistency
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent creates an equipotential state for scan values from redundant IO channels by implementing a data synchronization mechanism that ensures both primary and secondary controllers receive identical process data. This equalizes the data state across both controllers, maintaining control path consistency while allowing hardware differences to exist without affecting control logic

Inventive Principle:
Principle #12Equipotentiality

Solution Approach 2:

The patent introduces a data synchronization intermediary mechanism that mediates between the redundant IO channels and the control logic. This intermediary ensures that scan values from different hardware sources are normalized and synchronized before being processed by the control path, maintaining consistency while accommodating hardware variations

Inventive Principle:
Principle #24Intermediary (Mediator)

4Device complexity

If redundant IO channels are physically connected to shared IO, then device complexity is reduced, but data synchronization reliability deteriorates due to shared hardware failures

Engineering Contradiction:
ImproveIO connection complexityVSAvoiddata synchronization reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the IO connection architecture into dedicated primary and secondary IO channels, physically separating the data paths while maintaining logical synchronization through the data structure copying mechanism. This segmentation isolates potential failure points in shared hardware while preserving the simplified connection approach through structured data management

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a copy of the process data from the primary IO channel to the secondary IO channel, ensuring that even though the physical connections differ, the data states remain identical. This copying approach maintains synchronization reliability while allowing flexibility in physical IO configuration, including shared IO connections

Inventive Principle:
Principle #26Copying

Data Source

PatentEP3416014B1Process data synchronization between redundant process controllers
Publication Date: 2020.02.26 HONEYWELL INTERNATIONAL INC
  • EP3416014B1 patent drawingFigure 1
  • EP3416014B1 patent drawingFigure 2A~2B
  • EP3416014B1 patent drawingFigure 3A

AI summary

A fault-tolerant industrial control system (100) includes a redundant controller (140) including a first process controller (CP1) including a first processor (120) with a first associated memory (121), and a parallel connected second redundant process controller (140) (CP2) including a second processor (130) with a second associated memory (131). A redundancy link (135) is between CP1 and CP2 for sharing data. CP1 and CP2 include logic gates exclusive of any conditional branching for performing data synchronization and calculations including a different logical arrangement for providing each of a digital output (DO), a digital input (DI), an analog input (AI), and an analog output (AO). At least one input/output (IO) module includes a first IO processor including a first memory (152, 154) coupled by a first leg (LEG A) to CP1 and by a second leg (LEG B) to CP2. The IO module is coupled to field devices (112, 113) that are coupled to processing equipment (114).