Managing Partial Degradation in Redundant Data Processing Lines

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Solution Overview

Problem

Current methods for managing the partial degradation of electronic components in data processing architectures are inadequate, as they either focus on general public applications or bulky spatial redundancy, failing to address the specific issue of partial degradation effectively.

Innovation Solution

A method involving redundant data processing lines with switches and registers that compare electrical signals and adjust clock phases to detect and compensate for partial degradation, allowing for the management of electronic component aging and performance optimization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If spatial redundancy architectures (DMR, TMR) are used to detect or mask faults, then reliability is improved, but device complexity and area increase significantly

Engineering Contradiction:
Improvefault detection capabilityVSAvoidarchitecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a copy of the data processing line (second line) to serve as a reference for detecting degradation in the first line. Instead of using bulky spatial redundancy like TMR, it uses a single copied line with phase-shifted clocks to monitor temporal degradation, reducing hardware overhead while maintaining detection capability.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The second data processing line serves multiple functions: it processes data normally and simultaneously acts as a reference for detecting degradation in the first line. The same hardware is used for both computation and monitoring, eliminating the need for dedicated redundant hardware.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If phase shifting of clock signals is applied to detect partial degradation, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvedegradation detection precisionVSAvoidcontrol circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent changes the temporal parameter of the clock signal by applying phase shifts to the clock signals of the second data processing line. This allows the system to detect propagation time variations in the first line by comparing outputs at different time offsets, improving measurement precision without complex additional hardware.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP2834655B1Method for managing the partial degradation of electronic components, architecture and processor implementing the method
Publication Date: 2017.01.11 THALES SA
  • EP2834655B1 patent drawing
  • EP2834655B1 patent drawing
  • EP2834655B1 patent drawing

AI summary

The invention concerns a method for managing the partial degradation of electronic components forming part of a data processing architecture (10) comprising a first data processing line (12), a second data processing line (14), the two lines (12, 14) being redundant and being provided with corresponding storage registers (30, 32, 38, 40), the method comprising a step of introducing, into at least one register (32, 40) of the second line (14), at least one electrical signal identical to an electrical signal present in the first line (12).