Redundant Error Checking Circuit for Continuous Memory Verification
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Solution Overview
Problem
Existing semiconductor memory systems face challenges in continuously verifying the operation of error detection circuitry without software intervention, which reduces execution cycles available for application processing and requires special circuitry to introduce errors for testing.
Innovation Solution
A circuit and method utilizing redundant error checking circuits that operate continuously, comparing their outputs to detect any differences, thereby verifying the operation of error detection circuitry without introducing errors into memory, allowing for uninterrupted data verification and eliminating the need for software-controlled testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software-controlled testing is used to verify error detection circuitry, then testing can be performed, but execution cycles available for application processing are reduced
Solution Approach 1:
The error detection circuitry verifies itself through redundant parallel circuits that continuously compare their outputs. The first error checking circuit and second error checking circuit operate independently and automatically compare results, eliminating the need for external software testing interventions and preserving application processing execution cycles.
Solution Approach 2:
The redundant error checking circuits operate continuously in the background during normal memory operations. The comparison circuit continuously monitors the outputs of both error checking circuits, providing uninterrupted verification without pausing or reducing application processing cycles.
2Reliability
If special circuitry is introduced to test error detection, then verification capability is improved, but device complexity increases
Solution Approach 1:
The redundant error checking circuits serve dual purposes: they provide error detection functionality during normal operation and simultaneously serve as self-verification mechanisms. The comparison circuit performs both error detection and verification of the error detection circuitry itself, eliminating the need for separate dedicated testing circuitry.
Solution Approach 2:
The system uses a copy of the error checking circuit (second error checking circuit) that replicates the same functionality as the first error checking circuit. This copy operates in parallel and provides identical error detection capability, enabling automatic verification through comparison without requiring complex external testing equipment.
3Reliability
If error checking circuits operate continuously for verification, then reliability is improved, but energy consumption increases
Solution Approach 1:
The verification function is merged with the existing error checking operation. The same parallel circuit structure that performs error detection also performs self-verification by comparing its output with the first error checking circuit's output. This consolidation eliminates the need for separate verification circuitry and reduces overall energy consumption compared to having dedicated continuous verification systems.
Data Source
AI summary
A circuit and method for verifying the operation of error checking circuitry. In one example, a circuit includes a memory, a first error checking circuit, a second error checking circuit, and a comparison circuit. The memory includes a data output. The first error checking circuit includes an input and an output. The input of the first error checking circuit is coupled to the data output of the memory. The second error checking circuit includes an input and an output. The input of the second error checking circuit is coupled to the data output of the memory. The comparison circuit includes a first input and a second input. The first input is coupled to the output of the first error checking circuit. The second input is coupled to the output of the second error checking circuit.