Redundant Interconnect Bypass Circuitry for Semiconductor Yield
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Solution Overview
Problem
Current semiconductor chip technologies face high failure rates and low yield due to defects in high-density interconnects, lacking effective redundancy mechanisms to compensate for failed interconnects.
Innovation Solution
Incorporating redundant interconnects, such as Through Silicon Vias (TSVs) or bond wires, with circuitry that allows selection and rerouting of signals through redundant paths when primary interconnects fail, enabling parallel operation or bypassing defective interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high-density interconnects are used to increase communication capacity between chips, then the quantity of interconnects increases, but the failure rate increases proportionally leading to unacceptable yield
Solution Approach 1:
The patent applies preliminary action by incorporating redundant interconnects during the manufacturing process that remain dormant until needed. These spare interconnects are pre-positioned and can be activated through circuitry (such as fuses or switches) if primary interconnects fail, thereby preventing yield loss before the product reaches the customer.
Solution Approach 2:
The patent changes the operational state of interconnects from static to dynamic. Through the use of control circuitry (fuses, switches, or routing logic), the system can change which interconnects are active, transitioning from a fixed configuration to an adaptable one that responds to failure conditions, thereby maintaining reliability despite high density.
2Reliability
If redundant interconnects are added to compensate for failures, then reliability improves, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies universality by designing redundant interconnects that can serve multiple purposes: they remain as backup pathways during normal operation and can be activated to replace failed primary interconnects. The same physical structure serves both as primary and backup, reducing the need for completely separate redundant systems.
Solution Approach 2:
The patent uses copying by creating duplicate interconnect structures that mirror the primary interconnects. These copies are identical in structure and function, allowing them to perfectly substitute for failed primary interconnects. The copying approach simplifies the control logic since the redundant paths are already validated to work correctly.
3Reliability
If testing and repair mechanisms are implemented, then reliability improves, but manufacturing time and process complexity increase
Solution Approach 1:
The patent applies self-service through built-in self-test (BIST) and built-in self-repair (BISR) mechanisms that operate autonomously within the device. The interconnect structure includes embedded test circuits and repair logic that can automatically detect failures and activate redundant paths without external intervention, reducing manufacturing overhead while maintaining high reliability.
Data Source
AI summary
An integrated circuit, or combination of integrated circuits, has a primary interconnect, a redundant interconnect, and circuitry connecting the primary and redundant interconnects allowing selection of the redundant interconnect to bypass the primary interconnect.