Redundant Memory Array Capacitance for Row Hammer Resilience
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing complexity of memory control logic due to higher input/output rates and capacity, coupled with noise and data security issues, is exacerbated by row hammer attacks, which can damage memory data.
Innovation Solution
A memory system incorporating a redundant memory array with larger capacitance than normal memory units, along with a sense amplifier to amplify bit line voltages, and a control method that includes comparing target row addresses with repaired addresses to determine if a redundant row address is needed, thereby performing offset cancellation operations to mitigate the effects of row hammer attacks and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the input/output rate and capacity of memory are increased, then the productivity and capacity of the memory are improved, but the control logic becomes more complex and the memory cell is increasingly affected by noise
Solution Approach 1:
The memory array is divided into normal memory units and redundant memory units with different capacitance values. This segmentation allows the system to handle high input/output rates while maintaining simpler control logic by using capacitance-based differentiation to manage noise and data integrity without complex control mechanisms.
Solution Approach 2:
The patent changes the capacitance parameter of memory units to create distinct types (normal vs. redundant). By adjusting capacitance values, the system can mitigate noise effects and improve data stability without increasing control logic complexity, thus resolving the contradiction between high productivity and control complexity.
2Productivity
If the input/output rate and capacity of memory are increased, then the productivity and capacity of the memory are improved, but the memory cell is increasingly affected by noise
Solution Approach 1:
The patent utilizes capacitance parameter changes to create memory units with different noise susceptibility. By assigning larger capacitance to redundant units, the system can maintain high input/output rates while reducing noise impact through capacitance-based noise filtering and data integrity maintenance.
Solution Approach 2:
The patent creates a copy of the normal memory array as a redundant array with larger capacitance. This copy serves as a noise-resistant backup that can maintain data integrity during high-speed operations, effectively reducing noise effects without sacrificing productivity.
3Reliability
If a row hammer attack is performed on the memory, then the data security is compromised, but the memory structure becomes more vulnerable to attacks
Solution Approach 1:
The patent implements a redundant memory array as a copy of the normal array with larger capacitance. This copy is specifically designed to resist row hammer attacks by maintaining stable data through higher capacitance, thus improving data stability while reducing vulnerability to attacks.
Solution Approach 2:
The redundant memory units with larger capacitance serve as a pre-prepared cushion against row hammer attacks. By having these protected units available beforehand, the system can mitigate attack effects before they compromise data security, thus improving reliability without increasing structural vulnerability.
4Reliability
If a redundant memory array with larger capacitance is added to repair damaged word lines, then the reliability is improved, but the device complexity increases
Solution Approach 1:
The patent segments the memory array into normal and redundant units with distinct capacitance characteristics. This segmentation enables reliable data repair functionality while maintaining manageable complexity through clear functional differentiation between unit types, avoiding overly complex integrated designs.
Solution Approach 2:
The redundant memory units serve multiple functions: they act as backup storage, provide noise resistance, and enable data repair operations. This multi-functionality improves reliability without proportionally increasing complexity, as the same structural addition addresses multiple issues simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the impact of row hammer attacks and noise on memory data by ensuring proper voltage differences for accurate data reading, utilizing redundant arrays to repair damaged word lines and maintain data integrity.
Implementation Method 1
a sense amplifier, configured to amplify voltages of bit lines in the redundant memory array and the normal memory array
Implementation Method 2
the capacitance of a minimum memory unit in the redundant memory array is greater than the capacitance of a minimum memory unit in the normal memory array
Implementation Method 3
a sense amplifier corresponding to the normal to-be-activated word line is controlled to perform an offset cancellation operation
Data Source
AI summary
The present disclosure provides a memory and a control method. The memory includes at least: a redundant memory array and a normal memory array, where a word line in the redundant memory array is configured to repair a word line in the normal memory array, and the capacitance of a minimum memory unit in the redundant memory array is greater than the capacitance of a minimum memory unit in the normal memory array; and a sense amplifier, configured to amplify voltages of bit lines in the redundant memory array and the normal memory array.