Redundant Processor Array for Autonomous Vehicle Data Validation

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Solution Overview

Problem

Conventional processors and techniques are inadequate for handling and processing large volumes of data from various sources, such as personal devices and IoT systems, due to limitations in storage, transmission, and analysis capabilities, necessitating innovative hardware and software solutions for scalable data processing.

Innovation Solution

A reconfigurable computing architecture with a processor-implemented method for data validation using a reconfigurable fabric, where redundant processors are configured for coincident operation to perform data validation tasks, ensuring data integrity and reliability, particularly in critical applications like autonomous vehicle systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional processors are used for data processing, then device complexity is reduced, but data processing capability and reliability are insufficient for large-scale data validation

Engineering Contradiction:
Improvedata validation reliabilityVSAvoidprocessor array complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system divides the data processing task into multiple independent processor channels, where each processor handles a portion of the data validation independently. This segmentation allows parallel processing while maintaining individual processor simplicity, resolving the contradiction between reliability through redundancy and device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each processor in the array is designed with uniform, simple architecture optimized for specific data validation functions, while the overall system achieves high reliability through the collective behavior of multiple such processors. The local quality of each processor is kept simple, but the system-level reliability is enhanced through redundancy and comparison mechanisms.

Inventive Principle:
Principle #3Local quality

2Reliability

If redundant processors are deployed for data validation, then data integrity and reliability are improved, but system complexity and resource consumption increase

Engineering Contradiction:
Improvedata integrityVSAvoidredundant processor system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system creates identical copies of the validation agent across multiple processors, ensuring that each processor executes the same validation logic independently. This copying approach guarantees data integrity through redundancy while keeping individual processor designs simple and uniform, reducing the complexity of managing diverse components.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

Multiple processor outputs are merged through a comparison mechanism that validates results across all channels. The merging process combines the outputs of redundant processors into a single validated result, achieving high data integrity while managing system complexity through unified output integration.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If multiple redundant processors operate coincidently, then processing speed and validation confidence are enhanced, but synchronization complexity increases

Engineering Contradiction:
Improvedata processing speedVSAvoidsynchronization complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system employs periodic clock signals to synchronize the operation of multiple processors, ensuring they execute validation tasks in coordinated time intervals. This periodic action enables parallel processing at high speed while managing synchronization complexity through regular, predictable timing patterns rather than complex continuous coordination.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system uses feedback mechanisms where processor outputs are compared and validated against each other in real-time. This feedback loop ensures that all processors remain synchronized and produces high-confidence results by detecting and correcting any deviations, achieving both high processing speed and synchronization reliability.

Inventive Principle:
Principle #23Feedback

4Quantity of substance

If conventional processing techniques are used, then system simplicity is maintained, but capability to handle large data volumes is insufficient

Engineering Contradiction:
Improvedata processing volumeVSAvoidhardware architecture complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The system transitions from single-processor sequential processing to multi-processor parallel processing, adding a spatial dimension to the computation. This dimensional change enables the system to handle large data volumes by distributing processing across multiple channels simultaneously, overcoming the limitations of conventional single-processor architectures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Each processor in the array is designed as a universal, multi-functional unit capable of handling various data validation tasks. This universality allows the system to process diverse large-volume datasets using the same hardware architecture, achieving high data processing capability without requiring specialized complex hardware for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11645178B2Fail-safe semi-autonomous or autonomous vehicle processor array redundancy which permits an agent to perform a function based on comparing valid output from sets of redundant processors
Publication Date: 2023.05.09 MIPS TECH INC
  • US11645178B2 patent drawing
  • US11645178B2 patent drawing
  • US11645178B2 patent drawing

AI summary

Techniques are disclosed for processor synchronization within a reconfigurable computing environment for processor array redundancy. Processing elements are configured within a reconfigurable fabric to implement two or more redundant processors, where the two or more redundant processors are enabled for coincident operation. An agent is loaded on each of the two or more redundant processors, where the agent performs a function requiring data validation. The agent is fired on each of the two or more redundant processors to commence coincident operation. The coincident operation can include a lockstep operation. An output data result from each of the two or more redundant processors is compared to enable a data validation result. The data validation result is propagated. The propagating the data validation result can be based on comparing valid output data or can be based on comparing invalid output data.