Redundant-Sensing DAC Architecture for Super-Resolution Conversion
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Solution Overview
Problem
Existing digital-to-analog converters (DACs) face challenges in achieving super-resolution without post-processing, especially in the presence of mismatch error, which limits their precision and effectiveness in applications requiring high-resolution data acquisition.
Innovation Solution
The proposed digital-to-analog converter device employs a redundant sensing (RS) structure with a UNiform (UN) grouping method, which allows for the determination of anodic and cathodic component configurations to generate current pulses, effectively achieving super-resolution by exploiting mismatch error and optimizing unit cell sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If higher resolution ADCs/DACs are implemented, then measurement precision is improved, but device size and power consumption increase
Solution Approach 1:
The patent segments the high-resolution conversion task into multiple low-resolution measurements taken at different times. Instead of implementing a single high-resolution ADC/DAC, the system performs multiple sequential low-resolution conversions and combines them through processing to achieve the equivalent of high-resolution conversion, thereby reducing the chip area required for each individual converter.
Solution Approach 2:
The patent transitions from a spatial solution (increasing chip area for more bits) to a temporal solution (multiple measurements over time). By adding the time dimension to the conversion process, the system achieves high resolution without proportionally increasing the spatial footprint of the ADC/DAC circuitry.
2Measurement precision
If higher resolution ADCs/DACs are implemented, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent divides the high-resolution conversion into multiple low-resolution steps, where each step consumes less power than a single high-resolution conversion would require. The cumulative information from these low-power measurements achieves the desired resolution while keeping individual power consumption levels manageable.
Solution Approach 2:
The system performs multiple periodic measurements over time rather than a single high-power measurement. This periodic approach allows the system to achieve high resolution through temporal sampling, reducing the peak and average power consumption compared to continuous high-resolution operation.
3Measurement precision
If pixel density is improved, then measurement precision is improved, but noise increases limiting dynamic range
Solution Approach 1:
The patent merges multiple low-resolution measurements taken at different times to produce a high-resolution result. By combining these measurements through processing, the system achieves the benefits of high pixel density (fine resolution) while the temporal averaging reduces the impact of noise, thereby maintaining dynamic range.
4Measurement precision
If redundant sensing structure is used, then effective resolution is improved, but device complexity increases
Solution Approach 1:
The redundant sensing structure is segmented into multiple simple low-resolution measurement stages rather than a single complex high-resolution stage. Each stage uses straightforward ADC/DAC circuitry, and the redundancy is achieved through multiple sequential operations rather than through complex parallel hardware, thereby managing device complexity.
Data Source
AI summary
A digital-to-analog converter device including a set of components, each component included in the set of components including a number of unit cells, each unit cell being associated with a unit cell size indicating manufacturing specifications of the unit cell is provided by the present disclosure. The digital-to-analog converter device further includes a plurality of switches, each switch included in the plurality of switches being coupled to a component included in the set of components, and an output electrode coupled to the plurality of switches. The digital-to-analog converter device is configured to output an output signal at the output electrode. A first unit cell size associated with a first unit cell included in the set of components is different than a second unit cell size associated with a second unit cell included in the set of components.