Redundant Transceiver Routing for Higher IC Yield
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Solution Overview
Problem
Hybrid Integrated Circuits (ICs) face manufacturing challenges due to low production yield of high-speed analog circuitry, where a single defective Multi-Gigabit Transceiver (MGT) requires scrapping the entire PLD, leading to significant economic losses, especially if defects are detected after packaging.
Innovation Solution
Implementing a reconfigurable routing network that allows substitution of defective primary resources with redundant resources within the IC, enabling adaptive reconfiguration to bypass defective components and maintain functionality without altering the device's footprint or packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single MGT on a particular PLD is determined to be defective, then the entire PLD must be scrapped, but this results in maximized economic loss since most expenses have already been incurred
Solution Approach 1:
The PLD is segmented into multiple functional blocks including primary MGTs and redundant MGTs. Each MGT can be independently tested and replaced, allowing defective segments to be isolated without scrapping the entire device. The interconnect fabric is also segmented to enable selective reconfiguration of affected regions.
Solution Approach 2:
Redundant MGTs are pre-configured and positioned within the PLD architecture before any defects occur. Testing is performed early in the production process (wafer-level or pre-packaging) to identify defective MGTs before final assembly, enabling timely reconfiguration while minimizing economic loss.
2Productivity
If redundant resources are implemented to replace defective components, then yield increases, but device complexity increases due to additional reconfiguration mechanisms
Solution Approach 1:
The interconnect fabric is designed as a universal routing network that can dynamically connect any MGT (primary or redundant) to any I/O block. This multi-functional interconnect structure uses standardized switching elements and routing logic that simplifies the overall architecture compared to dedicated separate paths for each MGT.
Solution Approach 2:
Redundant MGTs are implemented as identical copies of primary MGTs with the same functional interface and internal structure. This copying approach allows the system to maintain simplicity by using duplicate functional units rather than complex replacement mechanisms, and the redundancy is transparent to the external interface.
Data Source
AI summary
A method and apparatus to provide various mechanisms to improve yield of an integrated circuit (IC) employing serial input/output (I/O) communication devices. A single error correction model provides one spare transceiver per group of primary transceivers, whereby reconfiguration of the IC isolates the defective transceiver and configures the replacement transceiver for operation in its place. A multiple error correction model is also provided, whereby multiple replacement transceivers may be configured to replace multiple defective transceivers. The replacement mechanism may occur during various phases of the IC, such as during wafer testing, final testing, or post-deployment testing.