Parallel Reed-Solomon Decoding via Umbrella Code Decomposition

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Solution Overview

Problem

Decoding Reed-Solomon codes quickly enough to meet the throughput requirements of high-speed data applications is challenging, especially when multiple Forward Error Correction (FEC) circuits are undesirable due to increased application-specific components and complexity.

Innovation Solution

The method involves decomposing a Reed-Solomon mother codeword into multiple parallel daughter codewords, processed in parallel to reduce latency and power consumption, using umbrella codes and a multi-core architecture for efficient syndrome calculation and error location, allowing for reduced latency and efficient error correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple FEC circuits are instantiated to achieve desired data throughput, then decoding speed is improved, but device complexity and number of application-specific components increase

Engineering Contradiction:
Improvedecoding speedVSAvoidnumber of FEC circuits
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments a single Reed-Solomon decoding task into multiple parallel decoding tasks by decomposing the mother codeword into multiple daughter codewords. Each daughter codeword is processed by a separate decoding instance, enabling parallel processing that increases throughput without requiring multiple complete FEC circuit implementations. This segmentation approach maintains functional efficiency while reducing overall device complexity.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple FEC circuits are instantiated to meet throughput requirements, then data processing capacity is improved, but power consumption increases

Engineering Contradiction:
Improvedata processing capacityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent divides the mother codeword into multiple daughter codewords that can be processed in parallel by shared decoding resources. This segmentation enables the system to achieve higher data processing capacity through parallelism while consuming less power than would be required by multiple complete FEC circuits, as the same decoding logic is reused across multiple parallel streams.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a universal decoding architecture that can process multiple daughter codewords using the same decoding logic and resources. This multi-functional approach allows a single decoding instance to handle multiple parallel decoding tasks, improving data processing capacity without the need for separate dedicated circuits for each stream, thereby reducing overall power consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If full codeword decoding is performed, then error correction capability is maintained, but latency increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddecoding latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the mother codeword into multiple smaller daughter codewords that can be decoded in parallel. This segmentation reduces the computational burden and latency for each individual decoding operation while maintaining overall error correction capability through the parallel processing of multiple segments. The system can achieve faster decoding by processing smaller units simultaneously rather than one large codeword sequentially.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8977938B2Parallel decomposition of Reed Solomon umbrella codes
Publication Date: 2015.03.10 ALTERA CORP
  • US8977938B2 patent drawing
  • US8977938B2 patent drawing
  • US8977938B2 patent drawing

AI summary

Systems, methods, apparatus, and techniques are presented for processing a codeword. A Reed-Solomon mother codeword n symbols in length and having k check symbols is received, and the n symbols of the received Reed-Solomon mother codeword are separated into v Reed-Solomon daughter codewords, where v is a decomposition factor associated with the Reed-Solomon mother codeword. The v Reed-Solomon daughter codewords are processed in a respective set of v parallel processes to output v decoded codewords.