Reentrant Bonding Pads for Void-Resistant Die-to-Die Assembly

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Solution Overview

Problem

The challenge in semiconductor manufacturing is to simultaneously achieve metal-to-metal bonding and dielectric-to-dielectric bonding between semiconductor dies, while accommodating height variations in the bonding surfaces and ensuring precise recess depth control of bonding pads to prevent voids and enhance bonding strength.

Innovation Solution

The use of reentrant shaped bonding pads with a smaller distal area at the bonding interface than the proximal area, which includes a combination of pad base portions and pillar portions, allows for effective metal-to-metal and dielectric-to-dielectric bonding by reducing the contact area and accommodating height differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If bonding pads are made with larger contact area to ensure bonding strength, then bonding strength is improved, but height variations cause misalignment and void formation

Engineering Contradiction:

Improvebonding strengthVSAvoidalignment precision

Core Design Contradiction:

StrengthVSManufacturing precision

Solution Approach 1:

The bonding pad is designed with a reentrant profile where the distal bonding surface is recessed relative to the proximal surface. This curvature in the vertical dimension allows the pad to accommodate height variations while maintaining adequate bonding contact area, resolving the conflict between bonding strength and alignment precision.

Inventive Principle:

Principle #14Spheroidality (Curvature)

Solution Approach 2:

The bonding pad structure varies locally in its vertical profile, with the distal portion recessed to accommodate height variations at the bonding interface, while the proximal portion maintains sufficient area for strong bonding. This local variation in geometry allows simultaneous achievement of both bonding strength and alignment tolerance.

Inventive Principle:

Principle #3Local quality

2Reliability

If metallic bonding structures are thermally expanded to fill openings, then bonding coverage is improved, but control of expansion becomes critical

Engineering Contradiction:

Improvebonding coverageVSAvoidexpansion control

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The bonding process utilizes thermal expansion by heating the metallic bonding structures to expand them into the openings. By controlling the temperature parameter during annealing, the expansion is controlled to achieve complete filling of openings without excessive growth, ensuring both bonding coverage and precision.

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If driver circuit is integrated on the same substrate as memory array, then device integration is improved, but available space for memory array is reduced

Engineering Contradiction:

Improvedevice integrationVSAvoidmemory array space

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The device is segmented into separate dies: a memory die containing the memory array and a logic die containing the driver circuit. These separate dies are then bonded together using the reentrant bonding pad structures, achieving device integration while preserving the full area of the memory array on its dedicated die.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables robust bonding between semiconductor dies by ensuring alignment of thermally expanded metallic surfaces with dielectric layers, thereby improving bonding strength and reducing void formation.

Implementation Method 1

annealing the second semiconductor die in contact with the first semiconductor die such that a metallic material of at least one of the first metallic bonding structures and the second metallic bonding structures expands to fill the openings in the first dielectric capping layer

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS12347804B2Bonded assembly including interconnect-level bonding pads and methods of forming the same

Publication Date: 2025.07.01 SANDISK TECHNOLOGIES LLC

AI summary

A method of forming a bonded assembly includes providing a first semiconductor die containing and first metallic bonding structures and a first dielectric capping layer containing openings and contacting distal horizontal surfaces of the first metallic bonding structures, providing a second semiconductor die containing second metallic bonding structures, disposing the second semiconductor die in contact with the first semiconductor die, and annealing the second semiconductor die in contact with the first semiconductor die such that a metallic material of at least one of the first metallic bonding structures and the second metallic bonding structures expands to fill the openings in the first dielectric capping layer to bond at least a first subset of the first metallic bonding structures to at least a first subset of the second metallic bonding structures.