In-Loop Reference Block Compression for Video Memory Bandwidth
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Solution Overview
Problem
Conventional video coding methods face memory bandwidth bottlenecks due to the transfer of large data volumes between on-chip and off-chip memory buffers, particularly in UHD video applications, where reconstructed blocks are written to and read from off-chip memory for decoding and display processing.
Innovation Solution
Implementing an in-loop memory bandwidth compression architecture that selectively compresses reconstructed blocks using lossless or lossy algorithms before writing to off-chip memory, with a compression algorithm indicator stored in on-chip memory, and decompresses the blocks as needed for retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reconstructed blocks are written to off-chip memory for storage and retrieval, then decoded picture data can be stored for motion compensation and display processing, but memory bandwidth consumption increases
Solution Approach 1:
The patent extracts only the essential reference picture data needed for motion compensation and display processing from the full reconstructed picture, storing it separately in a reduced representation format. This allows the system to maintain necessary decoded picture data while significantly reducing the bandwidth required to transfer complete picture data to off-chip memory.
Solution Approach 2:
The patent implements a nested memory structure where frequently accessed reference picture data is stored in on-chip memory buffers, while less frequently accessed data is stored in off-chip memory. This hierarchical nesting allows the system to prioritize access to critical data without requiring all data to be continuously transferred across the memory interface, thereby reducing overall bandwidth consumption.
2Adaptability or versatility
If complete reconstructed picture data is transferred to off-chip memory, then all picture data is available for any processing operation, but memory bandwidth becomes a bottleneck
Solution Approach 1:
The patent applies different storage qualities and formats to different regions or types of picture data based on their specific usage requirements. Reference pictures used for motion compensation are stored in a optimized format with appropriate precision, while other data may use different representations. This localized optimization ensures that each data element has the necessary quality for its specific purpose without requiring all data to be stored at maximum quality, thus improving productivity.
Solution Approach 2:
The patent implements partial action by transferring and storing only the subset of picture data that is actually needed for motion compensation and display processing, rather than transferring complete reconstructed picture data. This selective approach maintains sufficient data availability for required operations while avoiding the bandwidth bottleneck caused by transferring excessive data that may not be immediately or ever used.
3Ease of operation
If reference picture data is fetched from off-chip memory for motion compensation, then inter prediction can be performed, but memory bandwidth is consumed
Solution Approach 1:
The patent performs preliminary action by pre-processing and pre-storing reference picture data in optimized formats and locations before it is needed for motion compensation. Reference pictures are prepared and placed in appropriate memory buffers in advance, so that when motion compensation is required, the data is already in the correct format and location, minimizing the bandwidth required for actual retrieval and processing.
Solution Approach 2:
The patent introduces intermediary processing stages and buffer structures between the off-chip memory and the motion compensation logic. These intermediaries include on-chip buffer memory and data formatting logic that translate and prepare reference picture data before it reaches the motion compensation unit. This intermediary layer reduces the bandwidth burden on the main memory interface by performing preliminary data preparation and filtering.
Data Source
AI summary
A video decoder with in-loop memory bandwidth compression is provided. A video decoder includes a decoding logic configured to decode an encoded bitstream to generate a reference block of video data, and a memory bandwidth compression logic configured to compress the reference block of video data based on a selection between a first compression algorithm, second compression algorithm, or to copy the reference block without compression. Selection is based on at least one of the first block size, second block size, or uncompressed block size. The selected block is written to an off-chip memory, and a compression algorithm indicator associated with the selected block is written to an on-chip memory.