Reference Voltage Buffer Using Boosted Rails for Fast Settling
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Solution Overview
Problem
Conventional reference voltage buffers face challenges in achieving a wide reference voltage range while maintaining fast settling time and low power consumption, particularly under decreasing supply voltage conditions, which limits their performance in high-resolution data conversion systems.
Innovation Solution
The implementation of boosted power supply voltages and voltage feedback loops to decouple the gate drive voltages of NMOS and PMOS transistors, allowing for the generation of positive and negative reference voltages beyond the normal power supply range, thereby enabling a wide reference voltage range and fast settling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the power supply voltage is decreased to reduce power consumption, then power efficiency is improved, but the reference voltage range becomes limited
Solution Approach 1:
The patent extends the voltage generation beyond the conventional power supply rails by introducing boosted positive voltage (VDD2 > VDD) and boosted negative voltage (VSS2 < VSS). This dimensional extension in voltage space allows the reference voltage buffer to operate with a wider reference voltage range (1.0V range) while maintaining low power supply voltage (1.8V) for power efficiency.
Solution Approach 2:
The patent introduces voltage boosting circuits as intermediary components that generate elevated voltage levels (VDD2, VSS2) from the standard power supply (VDD, VSS). These intermediary voltage sources enable the NMOS and PMOS transistors to achieve the necessary gate drive voltages without directly increasing the main power supply voltage, thus maintaining power efficiency while expanding the reference voltage range.
2Adaptability or versatility
If the gate drive voltages are increased to achieve wide reference voltage range, then reference voltage range is improved, but power consumption increases
Solution Approach 1:
The patent segments the voltage generation function into two independent parts: the main power supply (VDD, VSS) that consumes power, and the voltage boosting circuits (VDD2, VSS2) that generate the necessary gate drive voltages. This segmentation allows the gate drive voltages to be elevated without proportionally increasing the main power supply voltage, thus achieving wide reference voltage range with controlled power consumption.
3Use of energy by moving object
If conventional power supply voltages are used to drive transistors, then power efficiency is maintained, but the reference voltage range is compressed
Solution Approach 1:
The patent breaks the direct coupling between power supply voltage and reference voltage range by operating in an extended voltage dimension. The reference voltage buffer uses standard power supply voltage (1.8V) for power efficiency while generating reference voltages that span a 1.0V range by utilizing boosted voltages for transistor gate drives, effectively decoupling these two parameters.
Data Source
AI summary
A reference voltage buffer circuit (20) includes first and second transistors (M1, M2) and first and second resistors (R1, R2) connected in series between positive and negative power supply voltages and providing a positive reference voltage (Vrp) and a negative reference voltage (Vrn) at the first current handling terminals of the first and second transistors, respectively. A first control voltage (Vg1) for driving the first transistor is generated by a first feedback loop and using a positive boosted voltage. A second control voltage (Vg2) for driving the second transistor is generated by a second feedback loop and using a negative boosted voltage. The first and second feedback loops establish the first and second control voltages while the positive and negative boosted voltages ensure sufficient drives are provided to the first and second transistors. The reference voltage buffer is capable of fast settling while maintaining a wide reference voltage range.