Reference Voltage Buffer With Active Loads for Fast Settling
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Solution Overview
Problem
Analog-to-digital converters face challenges with reference voltage buffers experiencing settling issues, signal instability due to process-voltage-temperature (PVT) variations, and the need for faster settling times and larger full-scale designs, which are difficult to achieve without compromising stability.
Innovation Solution
A reference voltage buffer design utilizing active loads and an inverse proportional to absolute temperature (PTAT) reference voltage generator, with loads and generator having matching PVT characteristics, and an open-loop load design to enhance settling time and full-scale stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the reference voltage buffer uses active devices as loads to generate reference voltages, then the full-scale can be designed larger, but the reference voltage becomes unstable due to PVT variation
Solution Approach 1:
The patent changes the operating parameters of the active loads by applying reverse bias voltages to their gate terminals. This parameter modification allows the loads to operate in a region where they provide both large voltage swing capability (maintaining full-scale) and reduced sensitivity to PVT variations (improving stability). The reverse bias condition fundamentally alters the load characteristics to simultaneously achieve both goals.
Solution Approach 2:
The patent implements a feedback mechanism where the output voltages of the active loads are fed back to their respective gate terminals through resistive dividers. This feedback loop continuously adjusts the gate voltages to maintain stable output reference voltages despite PVT variations, while preserving the large full-scale range enabled by the active load configuration.
2Loss of time
If the settling time of the reference voltage buffer is designed shorter for faster clock signals, then the reference voltages can keep up with sampling rate, but the stability and noise tolerance may be compromised
Solution Approach 1:
The patent introduces dynamic control of the active loads through feedback mechanisms that adjust load conditions in real-time based on output voltage levels. This dynamic adaptation allows the buffer to achieve fast settling by optimizing load impedance during transient conditions, while maintaining stability during steady-state operation. The system transitions between different operational regimes to balance speed and stability requirements.
Data Source
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AI summary
The present invention provides a reference voltage buffer comprises a reference voltage generator, a first operational amplifier, a first transistor, a first group of resistors, a first load, a second transistor, a second group of resistors and a second load. In the reference voltage buffer, the first load and the second load use active device to increase the settling time, and the first load, the second load and the reference voltage generator of the reference voltage buffer are resigned to have the same characteristics in response to the temperature variation to overcome the PVT issue, and the first load and the second load of the reference voltage buffer use the open-loop design to have large full-scale of the output reference voltages.