Reference Voltage Buffer Timing for MOSFET Overvoltage Control

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Solution Overview

Problem

The design of conventional reference voltage buffer circuits for analog-to-digital converters (ADCs) faces challenges in reducing harmonic distortion and overvoltage risks due to incomplete reference voltage establishment, leading to inefficiencies and reliability issues.

Innovation Solution

A reference voltage buffer circuit is designed with a delay control branch and feedback branch, utilizing MOSFETs and operational amplifiers to control voltage output and ensure quick discharge when powered down, reducing overvoltage risks and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a reference voltage buffer circuit is introduced to enhance driving capability, then harmonic distortion is reduced, but overvoltage risk increases when the circuit is powered down

Engineering Contradiction:
Improveharmonic distortion reductionVSAvoidovervoltage risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The delay control branch is activated in advance before the first MOSFET turns off, ensuring that the second MOSFET is already in the off state when the first MOSFET begins to discharge. This preliminary action prevents overvoltage by establishing the discharge path before the main switching action occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The delay control branch acts as an intermediary between the feedback branch and the MOSFETs, mediating the timing of their operation. It receives the feedback signal and introduces a controlled delay to coordinate the switching sequence of the MOSFETs, thereby resolving the conflict between maintaining voltage output and preventing overvoltage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If the first MOSFET is turned off quickly to reduce power consumption, then energy efficiency improves, but voltage spikes may occur at the drain node

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage spikes
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The delay control branch applies a counteracting action by turning off the second MOSFET before the first MOSFET. This preliminary anti-action creates a discharge path that prevents voltage spikes from occurring when the first MOSFET turns off, thereby eliminating the harmful effect while maintaining energy efficiency.

Inventive Principle:
Principle #9Preliminary anti-action

3Productivity

If the circuit operates in high-speed mode to improve ADC conversion speed, then productivity increases, but the reference voltage establishment time becomes insufficient

Engineering Contradiction:
ImproveADC conversion speedVSAvoidreference voltage establishment time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The circuit operates in periodic cycles, alternating between a first time period where the reference voltage is established and output, and a second time period where both MOSFETs are turned off for discharge. This periodic operation allows the reference voltage to be fully established during the first period while maintaining high-speed operation during the second period, thus resolving the conflict between speed and establishment time.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11824549B2Reference voltage buffer circuit
Publication Date: 2023.11.21 SHENZHEN GOODIX TECH CO LTD
  • US11824549B2 patent drawing
  • US11824549B2 patent drawing
  • US11824549B2 patent drawing

AI summary

A reference voltage buffer circuit is provided, which could improve the reliability of the reference voltage buffer circuit, including: at least one output branch, where each output branch includes a delay control branch, a first MOSFET, and a second MOSFET; and a feedback branch, where in a first time period, the feedback branch is configured to output a first voltage to the delay control branch, and the delay control branch is configured to control the first MOSFET and the second MOSFET to be turned on, such that a source of the first MOSFET continuously outputs a reference voltage; and in a second time period, a voltage output from the feedback branch to the delay control branch is 0, the delay control branch is configured to control the second MOSFET to be turned off before the first MOSFET is turned off.