Reference Buffer Switching for Low-Offset High-Speed ADCs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Reference buffers for analog-to-digital converters (ADCs) require fast transient response time with minimal power consumption and must minimize systematic or random offset to avoid gain errors.
Innovation Solution
A reference buffer design that alternates between closed-loop and open-loop phases, utilizing a flipped voltage-follower configuration and chopper stabilization to maintain accurate output voltage while minimizing power consumption and offset errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the amplifier operates in closed-loop mode continuously, then offset accuracy is improved, but power consumption increases and transient response slows down
Solution Approach 1:
The amplifier alternates between closed-loop and open-loop phases periodically. During closed-loop phases, the amplifier corrects offset errors with high precision. During open-loop phases, the amplifier is isolated from capacitive loading to reduce power consumption and enable fast transient response. This periodic switching resolves the contradiction by achieving both accuracy and energy efficiency at different times.
Solution Approach 2:
The chopper stabilization circuit performs offset cancellation in advance during dedicated calibration phases before the amplifier enters open-loop mode. By pre-correcting offset errors, the system maintains measurement precision without requiring continuous closed-loop operation, thereby reducing overall power consumption.
2Measurement precision
If the amplifier operates in closed-loop mode continuously, then offset accuracy is improved, but transient response speed decreases
Solution Approach 1:
The system switches between closed-loop and open-loop modes periodically. During closed-loop phases, offset accuracy is maintained through feedback correction. During open-loop phases, the amplifier can respond rapidly to transient changes without being constrained by feedback loop bandwidth limitations, thus achieving fast transient response.
Solution Approach 2:
The amplifier's operating mode is made dynamic rather than static. The system adapts between closed-loop and open-loop configurations based on operational requirements, enabling the amplifier to optimize between accuracy and speed differentially across time rather than being constrained by a fixed configuration.
3Use of energy by moving object
If the amplifier is isolated from capacitive loading, then power consumption decreases and transient response improves, but offset cancellation capability is reduced
Solution Approach 1:
The amplifier alternates between open-loop mode (for low power and fast response) and closed-loop mode (for offset cancellation). During periodic closed-loop phases, the amplifier reconnects to the feedback network to perform offset correction. This periodic reconnection maintains offset cancellation capability while spending most time in the lower-power open-loop state.
Solution Approach 2:
Offset cancellation is performed in advance during closed-loop calibration phases before the amplifier transitions to open-loop mode. By pre-correcting offset errors when the feedback path is available, the system prepares the amplifier for accurate operation during subsequent open-loop phases without requiring continuous feedback connection.
Data Source
AI summary
A reference buffer is disclosed. The reference buffer includes an amplifier configured to amplify a difference between a reference output voltage and a reference input voltage during a closed-loop phase of the reference buffer. The reference buffer also includes a sample circuit configured to sample an amplifier output voltage during the closed-loop phase. The reference buffer further includes a buffer circuit having a buffer input coupled to the sample circuit and a buffer output configured to provide the reference output voltage. The reference buffer also includes first and second switch circuits. The first switch circuit is configured to isolate the sample circuit from the output stage of the amplifier during an open-loop phase of the reference buffer. The second switch circuit is configured to isolate the input stage from the output of the reference buffer during the open-loop phase.