Reference Bus Timing Architecture for Synchronized Engine I/O
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Modern control systems for engines face complexity in managing multiple components and signals, particularly in generating precise control signals for components like spark plugs and fuel injectors, where existing systems lack efficient scheduling and synchronization of digital I/O signals.
Innovation Solution
A control system architecture that includes a reference-bus and event-bus controller, timer circuits, I/O circuits, and analog comparator circuits, which use programmable registers and multiplexers to manage and synchronize digital I/O signals, ensuring precise timing and control of engine components through a centralized processing unit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a complex set of algorithms and sensors are used to control engine components, then the control precision and functionality are improved, but the system complexity increases
Solution Approach 1:
The control system is divided into separate functional modules: a reference bus for distributing timing signals, event buses for coordinating component operations, timer circuits for generating precise intervals, and I/O circuits for digital signal management. Each module handles specific tasks independently, reducing overall system complexity while maintaining high control precision through coordinated operation of these segmented components.
2Adaptability or versatility
If multiple timer circuits and I/O circuits are added to control more engine components, then the functionality and control capability are improved, but the device complexity increases
Solution Approach 1:
The reference bus and event bus architectures provide universal timing and coordination mechanisms that serve multiple timer circuits and I/O circuits simultaneously. The reference bus distributes standardized timing signals to various components, while event buses coordinate operations across different circuit types, allowing the system to control diverse engine components (fuel injectors, spark plugs, valves) through unified communication protocols rather than requiring separate dedicated control paths for each component.
3Reliability
If digital I/O signals are synchronized through a centralized processing unit with reference-bus and event-bus controllers, then the signal coordination and reliability are improved, but the system complexity increases
Solution Approach 1:
The reference bus controller and event bus controller act as intermediary components that mediate between the centralized processing unit and multiple timer/I/O circuits. These intermediaries translate high-level control commands into precise timing signals and coordinate signal distribution across the system, ensuring reliable synchronization without requiring the processing unit to directly manage each individual circuit, thus reducing the complexity burden on the central processor while maintaining strong signal coordination.
Data Source
AI summary
A system that includes a multiplexer having an output selectively coupled to a plurality of inputs, a bus coupled to the output of the multiplexer, and first and second circuits configured to generate first and second digital signals, respectively. The first digital signal is related to a rotational angle of a crankshaft at a first point in time, and the second digital signal is related to a value of parameter at the first point in time, wherein the parameter is one other than the rotational angle of the crankshaft. The first and second circuits are coupled directly or indirectly to first and second inputs of the multiplexer.