Reference Cell Adjustment Circuit for Non-Volatile Memory Read Margin Stability

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Solution Overview

Problem

Non-volatile memory devices face the challenge of charge gain or soft programming, which causes a shift in reference levels during read cycles, degrading the read margin and potentially increasing chip area, especially when using multiple reference cells for every read cycle.

Innovation Solution

A semiconductor device and method that employs a first reference cell and a second reference cell with an adjustment circuit, including a comparator and trimming circuit, to compare and adjust the first reference level based on the second reference level, thereby maintaining the initial current level and preventing charge gain without increasing chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple reference cells are used for every read cycle to prevent charge gain, then reliability is improved, but device complexity and chip area increase

Engineering Contradiction:
Improveread margin stabilityVSAvoidnumber of reference cells
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reference cell functionality is segmented into two distinct cells: a first reference cell used during read operations and a second reference cell used for adjustment operations. This segmentation allows each cell to perform a specific function, preventing charge gain accumulation while maintaining read margin stability without requiring multiple reference cells for every read cycle

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The adjustment circuit performs preliminary adjustment of the first reference cell's reference level using the second reference cell before read operations. By pre-adjusting the reference level to compensate for charge gain, the system maintains reliability without needing multiple reference cells during actual read cycles

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple reference cells are used for every read cycle to prevent charge gain, then reliability is improved, but chip area increases

Engineering Contradiction:
Improveread margin stabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The reference cell functionality is segmented into two distinct cells: a first reference cell used during read operations and a second reference cell used for adjustment operations. This segmentation allows each cell to perform a specific function, preventing charge gain accumulation while maintaining read margin stability without requiring multiple reference cells for every read cycle

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second reference cell serves as a reference copy that provides a stable reference level for adjusting the first reference cell. By using this copy to periodically adjust the first reference cell, the system maintains reliability with minimal chip area, avoiding the need to store multiple active reference cells

Inventive Principle:
Principle #26Copying

3Reliability

If reference cell levels are adjusted frequently to prevent charge gain, then reliability is improved, but productivity decreases

Engineering Contradiction:
Improvereference level stabilityVSAvoidread operation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The adjustment circuit operates periodically rather than continuously, adjusting the first reference cell's reference level at predetermined intervals using the second reference cell. This periodic adjustment maintains reference level stability and reliability while minimizing interference with read operation speed and productivity

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8031527B2Semiconductor device and method for adjusting reference levels of reference cells
Publication Date: 2011.10.04 INFINEON TECHNOLOGIES LLC
  • US8031527B2 patent drawing
  • US8031527B2 patent drawing
  • US8031527B2 patent drawing

AI summary

A semiconductor device includes a first reference cell used for programming or reading non-volatile memory cells, and an adjustment circuit adjusting a first reference level of the first reference cell when the first reference level is changed.