Reference Cell Gate Voltage Control for Nonvolatile Memory Current Generation
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Solution Overview
Problem
Existing nonvolatile semiconductor memory devices, such as ReRAM, face challenges in generating multiple reference currents with fine resolution due to the need for multiple polysilicon resistance elements, leading to increased circuit area and limited step width precision.
Innovation Solution
The implementation of a nonvolatile semiconductor memory device with a reference cell comprising serially connected transistors, where the gate voltage of a variable resistance transistor is controlled by a driver circuit, allowing for fine adjustment of the reference current without the need for multiple resistance elements, thereby reducing circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple polysilicon resistance elements are used to generate multiple reference currents, then different reference current values can be obtained, but the circuit area increases
Solution Approach 1:
The patent changes the parameter of resistance by controlling the gate voltage of a single transistor rather than using multiple fixed resistance elements. By varying the gate voltage, the resistance value changes continuously, enabling generation of multiple reference current values from a single transistor structure, thus reducing circuit area while maintaining adaptability.
Solution Approach 2:
A single transistor is made to perform multiple functions by controlling its gate voltage to generate different reference current values. Instead of having separate circuits for each reference current value, one transistor can provide multiple reference currents through voltage control, achieving multi-functionality and reducing the number of components needed.
2Quantity of substance
If polysilicon resistance elements are used for reference currents, then reference currents can be generated, but the step width of reference currents cannot be finely controlled
Solution Approach 1:
The patent transitions from static fixed resistance elements to a dynamic transistor-based resistance control system. The gate voltage can be dynamically adjusted to change the resistance value continuously, enabling fine control of reference current step width. This dynamic control allows for precise adjustment of current values that cannot be achieved with fixed polysilicon resistance elements.
3Area of stationary object
If a single reference cell is used, then circuit area is reduced, but fine control of reference current is limited
Solution Approach 1:
The patent replaces the mechanical/physical approach of using multiple discrete resistance elements with an electrical control approach using transistor gate voltage. This substitution allows for continuous and fine control of resistance and current through voltage adjustment, providing ease of operation while maintaining a compact single-transistor structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise control of reference currents with a single reference cell, reducing the circuit area and improving the operational efficiency of the memory device.
Implementation Method 1
In the reference cell, the first transistor TR1 operates as a selective transistor. By contrast, the second transistor TR2 operates as a variable resistance element since the on-resistance value of the second transistor TR2 varies by adjusting the gate voltage thereof.
Data Source
AI summary
A nonvolatile semiconductor memory device includes: a memory cell array having a plurality of memory cells arranged in a matrix; a reference bit line; a reference source line; at least one reference cell including first and second transistors serially connected between these lines; a reference word line connected to the gate of the first transistor; and a reference driver circuit configured to control the gate voltage of the second transistor.