Reference Clock Signal Generation Circuit for Charge-Pump Power Supply
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Solution Overview
Problem
Existing power supply circuits for electro-optical devices, such as liquid crystal display panels, face challenges in reducing power consumption during the start period while maintaining output capability, leading to increased battery life in battery-driven instruments and simplifying user settings, as they often require unnecessary high frequencies for switch control signals.
Innovation Solution
A reference clock signal generation circuit that adjusts frequencies based on a wait time and frequency setting registers, allowing for different clock signal frequencies in the start and operation periods, reducing power consumption by minimizing the frequency of the reference clock signal in the operation period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the frequency of the switch control signal is increased to increase the output capability of the charge-pump circuit, then the output capability is improved, but power consumption is increased
Solution Approach 1:
The patent applies dynamics by making the clock signal frequency adjustable based on operational requirements. The system transitions from a fixed frequency to a variable frequency that adapts between start period (high frequency for output capability) and operation period (low frequency for power saving), resolving the contradiction between power and output capability
Solution Approach 2:
The patent changes the frequency parameter of the clock signal based on operational phase. By setting different frequency values in wait time setting register and frequency setting register, the system optimizes the balance between output capability and power consumption for different operational states
2Power
If the frequency of the switch control signal is set high in the start period to ensure output capability, then the output capability is maintained, but unnecessary power consumption occurs in the operation period
Solution Approach 1:
The patent segments the operational timeline into distinct phases: start period and operation period. Each phase receives appropriately optimized clock frequencies - high frequency during start period for output capability, and low frequency during operation period to eliminate unnecessary power consumption
Solution Approach 2:
The system implements periodic action by alternating between different frequency states corresponding to different operational phases. The clock signal frequency is periodically adjusted based on whether the system is in start period or operation period, optimizing energy efficiency
3Use of energy by moving object
If the user sets the frequency of the switch control signal manually for different periods, then the power consumption can be optimized, but the firmware size is increased
Solution Approach 1:
The system implements self-service by automatically managing frequency transitions between start period and operation period. The microcomputer automatically selects appropriate frequencies based on operational phase without requiring complex user firmware, reducing firmware size while maintaining power optimization
4Ease of operation
If the user sets the frequency without knowing the actual start period, then the setting process is simplified, but it becomes difficult to determine whether a malfunction is caused by user setting or power supply circuit
Solution Approach 1:
The patent implements feedback by providing the microcomputer with knowledge of the actual start period duration. This feedback enables the system to automatically configure appropriate frequencies and facilitates malfunction detection by comparing expected versus actual operational parameters
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption in the operation period while maintaining the necessary output capability during the start period, allowing for a more efficient and user-friendly power supply circuit design.
Implementation Method 1
The power supply circuit generates the power supply voltages by raising or lowering a system power supply voltage. The power supply circuit may include a charge-pump circuit which raises or lowers voltage by a charge-pump operation.
Data Source
AI summary
A reference clock signal generation circuit for generating a reference clock signal for a charge-pump operation which raises or lowers a voltage includes a clock signal generation circuit which generates a reference clock signal having one of first to nth (n is an integer of two or more) frequencies, a wait time setting register in which a value corresponding to a wait time is set, and a frequency setting register in which a value corresponding to one of the first to nth frequencies is set. The clock signal generation circuit generates the reference clock signal having a predetermined frequency in a start period from start of the charge-pump operation to completion of the wait time, and generates the reference clock signal having a frequency corresponding to the value set in the frequency setting register in an operation period after the start period.