Reference Frequency Generation Circuit Stabilization

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Solution Overview

Problem

Conventional reference frequency generation circuits face challenges in stabilizing the frequency of the reference clock due to varying delay times caused by changes in temperature and power supply voltage, leading to fluctuations in frequency, especially as the frequency increases, which complicates oscillation control and increases power consumption.

Innovation Solution

A reference frequency generation circuit is designed with an oscillator circuit that alternately adjusts the signal levels of oscillation signals and an oscillation control circuit that transitions the reference clock based on comparison voltages, along with a feedback control mechanism to maintain constant swings of the oscillation signals, reducing frequency fluctuations and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional oscillation control circuits are used to generate reference clocks, then the reference clock frequency can be generated, but the frequency fluctuates due to varying delay times caused by temperature and power supply voltage changes

Engineering Contradiction:
Improvereference clock frequency stabilityVSAvoidtemperature sensitivity of delay time
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent applies feedback control by monitoring the actual oscillation frequency and adjusting the oscillation control signal to compensate for delay time variations. The feedback mechanism detects frequency deviations caused by temperature and voltage changes and dynamically adjusts the control parameters to maintain stable reference clock output.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the parameters of the oscillation control circuit, specifically adjusting the control voltage or current parameters in response to detected frequency deviations. By dynamically modifying these control parameters based on environmental conditions, the circuit compensates for delay time variations and maintains frequency stability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the oscillation control circuit response time is reduced to minimize delay time effects, then frequency stability improves, but power consumption increases

Engineering Contradiction:
Improvefrequency stabilityVSAvoidpower consumption of oscillation control circuit
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic operation of the oscillation control circuit, adjusting its responsiveness based on operating conditions. The circuit dynamically modifies its control signal characteristics and response behavior to achieve frequency stability while optimizing power consumption by avoiding continuously high-speed operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic adjustment of the oscillation control parameters rather than continuous high-speed adjustment. By using periodic control actions synchronized with the oscillation cycle, the circuit achieves frequency stability while reducing average power consumption compared to continuous high-response-mode operation.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If the oscillation control circuit operates at high speed to reduce delay time impact, then frequency control accuracy improves, but noise levels increase

Engineering Contradiction:
Improvefrequency control accuracyVSAvoidnoise from oscillation control circuit
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent uses periodic control actions that are synchronized with the natural oscillation cycle, avoiding high-speed switching operations that generate noise. The periodic adjustment timing is chosen to minimize noise generation while maintaining sufficient frequency control accuracy.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent introduces an intermediary control mechanism that translates high-precision frequency detection into smoother, lower-noise control signals. The intermediary stage processes the frequency error signal and generates control outputs that achieve accurate frequency control without the noise associated with direct high-speed switching.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8212624B2Reference frequency generation circuit, semiconductor integrated circuit, and electronic device
Publication Date: 2012.07.03 PANASONIC HOLDINGS CORP
  • US8212624B2 patent drawing
  • US8212624B2 patent drawing
  • US8212624B2 patent drawing

AI summary

An oscillator circuit increases and reduces signal levels of first and second oscillation signals in a complementary manner in response to a transition of a signal level of a reference clock. An oscillation control circuit compares each of the signal levels of the first and second oscillation signals to a comparison voltage, and causes the signal level of the reference clock to transition according to results of the comparison. A reference control circuit increases or reduces the comparison voltage so that a difference between a signal level of an intermediate signal which is proportional to respective swings of the first and second oscillation signals and a reference voltage is reduced.