Reference-Less Frequency Detection for VCO Dead-Zone Polarity
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Solution Overview
Problem
Conventional voltage controlled oscillator (VCO) calibration and clock and data recovery (CDR) techniques require a reference clock, which is not always available, especially in power and area-limited circuits, and are susceptible to jitter and inter-symbol interference (ISI), leading to a 'dead zone' problem where frequency detection fails to resolve polarity at zero frequency difference.
Innovation Solution
A reference-less clock recovery circuit with a frequency detection circuit that includes a reference-less frequency detector and a VCO calibration module, which performs automatic calibration of the VCO to optimize gain based on the input data rate, and a phase detection circuit that synchronizes the VCO output with the data signal, using a heuristic algorithm to resolve polarity within the 'dead zone' range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference clock is used for VCO calibration and CDR, then frequency accuracy is improved, but device complexity and power consumption increase due to additional reference clock routing
Solution Approach 1:
The patent extracts the frequency reference function from an external reference clock and implements it using only the incoming data signal itself. The frequency detector uses the data signal's transitions to generate frequency error information, eliminating the need for separate reference clock routing while maintaining frequency acquisition capability.
Solution Approach 2:
The data signal serves multiple functions: it is both the input signal to be recovered and the frequency reference for calibration. The same data signal that carries information also provides the timing reference needed for VCO calibration, eliminating the need for dedicated reference clock infrastructure.
2Measurement precision
If conventional frequency detection is used, then frequency difference detection is improved, but reliability deteriorates within the dead zone where frequency difference is near zero
Solution Approach 1:
The patent transitions from detecting frequency difference magnitude alone to detecting both magnitude and polarity (sign) of the frequency difference. By using separate detection paths for positive and negative frequency differences, the system resolves the dead zone ambiguity where conventional single-dimensional detection fails to determine polarity at zero frequency difference.
Solution Approach 2:
The patent introduces intermediate detection stages that process frequency difference information through multiple paths before final determination. The frequency detector uses intermediate signals to resolve polarity ambiguity in the dead zone, acting as mediators that transform ambiguous frequency difference information into reliable polarity-determined error signals.
3Device complexity
If VCO calibration is performed without reference clock, then device complexity is reduced, but measurement precision of frequency detection deteriorates due to jitter and ISI
Solution Approach 1:
The system uses its own input data signal to perform frequency calibration without external assistance. The data signal itself provides the reference information needed for VCO calibration, making the system self-sufficient and eliminating dependence on external reference clocks while maintaining calibration precision through intelligent signal processing.
Solution Approach 2:
The patent implements feedback mechanisms where frequency detection results are fed back to adjust VCO calibration. The frequency error information generated from the data signal is used to correct VCO frequency deviations, creating a closed-loop system that maintains precision without requiring external reference clocks.
Data Source
AI summary
Embodiments provide a reference-less frequency detector that overcomes the “dead zone” problem of conventional circuits. In particular, the frequency detector is able to accurately resolve the polarity of the frequency difference between the VCO clock signal and the data signal, irrespective of the magnitude of the frequency difference and the presence of VCO clock jitter and/or ISI on the data signal.