Reference-Less Frequency Detector for Multi-Format Clock Recovery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing clock and data recovery (CDR) circuits require a reference clock signal, increasing complexity and cost, and are limited to recovering clock signals from Non-Return to Zero (NRZ) data signals, failing to accommodate other modulation formats.
Innovation Solution
A reference-less CDR circuit that uses sampling circuits and a control circuit to generate control signals for adjusting the frequency of a clock signal based on an input data signal, allowing recovery of clock signals from any modulation format, including NRZ, PAM, and PAM4 data signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference clock signal is used in the FLL circuit, then the frequency locking accuracy is improved, but the device complexity and cost increase
Solution Approach 1:
The patent removes the reference clock signal from the FLL circuit, extracting the problematic component that caused increased complexity and cost. The frequency detector achieves frequency locking without requiring an external reference clock, thereby maintaining accuracy while reducing device complexity.
Solution Approach 2:
The FLL circuit is modified to be self-sufficient by eliminating the dependency on external reference clock signals. The frequency detector uses the input data signal itself to generate control signals for the VCO, allowing the system to lock frequency without external assistance, thus reducing both complexity and cost.
2Reliability
If D-type flip flops are used to sample the clock signal, then the clock recovery function is achieved, but the adaptability to different data signal formats is reduced
Solution Approach 1:
The frequency detector is designed with universal functionality to handle multiple data signal formats including NRZ, PAM, and PAM4. The frequency detector and control circuit can process different modulation formats by detecting frequency information from the input data signal regardless of its specific format, making the system adaptable and versatile.
Solution Approach 2:
The system adapts to different data signal formats by dynamically adjusting parameters such as the sampling frequency and control signal generation based on the detected frequency information. The frequency detector can extract frequency characteristics from various modulation formats and adjust the VCO accordingly, enabling universal clock recovery across different signal types.
3Measurement precision
If the sampling frequency is increased to improve frequency detection accuracy, then the measurement precision is improved, but the energy consumption increases
Solution Approach 1:
The frequency detector employs a feedback mechanism where the detected frequency information is used to generate control signals that adjust the VCO output frequency. This feedback loop allows the system to achieve accurate frequency detection and locking without requiring excessively high sampling frequencies, thereby optimizing energy consumption while maintaining detection precision.
Data Source
AI summary
An apparatus comprises a plurality of sampling circuits configured to receive a non-Non Return to Zero (non-NRZ) data signal; and a control circuit coupled to the plurality of sampling circuits, wherein the control circuit is configured to provide one or more control signals indicating whether to decrease or increase a frequency of a clock signal associated with the non-NRZ data signal based on the non-NRZ data signal.