Reference Plane Voltage Control for PCB Impedance Matching

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Solution Overview

Problem

Manufacturing errors in signal transmission lines on printed circuit boards affect the characteristic impedance, making it difficult to maintain sufficient signal quality as transmission speeds increase, especially in high-speed semiconductor devices.

Innovation Solution

A semiconductor device and system that includes a receiving terminal, a reference plane voltage terminal, and a voltage generating circuit to adjust the characteristic impedance of signal transmission lines by varying the potential of the reference plane, using a feedback mechanism to optimize signal quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the transmission rate is increased to transmit large volumes of data at high speed, then the data transmission speed is improved, but the signal waveform disturbance increases making it difficult to ensure sufficient signal quality

Engineering Contradiction:
Improvedata transmission speedVSAvoidsignal quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent changes the electrical parameter (voltage potential) of the reference plane to adjust the characteristic impedance of the signal transmission line. By varying the potential of the reference plane, the system adapts the transmission line's impedance characteristics to match the high-speed signal requirements, thereby maintaining signal quality at increased transmission rates

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a feedback mechanism where the semiconductor device measures the signal quality or impedance characteristics and adjusts the reference plane potential accordingly. This closed-loop control enables dynamic optimization of signal transmission quality as transmission speed increases

Inventive Principle:
Principle #23Feedback

2Ease of manufacture

If the shape of the signal transmission line is fixed during manufacturing, then the manufacturing process is simplified, but the characteristic impedance cannot be adjusted after manufacturing due to manufacturing errors

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidcharacteristic impedance control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent transforms the static reference plane (fixed during manufacturing) into a dynamic element by enabling voltage adjustment. The reference plane potential can be changed after manufacturing to compensate for impedance variations caused by manufacturing tolerances, thus maintaining both manufacturing simplicity and impedance precision

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Instead of changing the physical shape or dimensions of the transmission line (which would require complex manufacturing), the patent changes the electrical parameter (voltage) of the reference plane to achieve impedance matching, preserving manufacturing simplicity while improving precision

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution allows for adjusting the characteristic impedance of signal transmission lines post-manufacturing, improving signal quality, reducing common mode noise, and enhancing the design efficiency and cost-effectiveness of semiconductor systems.

Implementation Method 1

a voltage generating circuit configured to generate a reference plane voltage for the reference plane based on the signal received by the receiving terminal

Methodology Applied
Scientific EffectElectrical impedance adjustment through voltage control: Electrical Resistance

Data Source

PatentUS12560955B2Semiconductor device and semiconductor system
Publication Date: 2026.02.24 RENESAS ELECTRONICS CORP
  • US12560955B2 patent drawing
  • US12560955B2 patent drawing
  • US12560955B2 patent drawing

AI summary

A semiconductor device includes a receiving terminal for receiving a signal transmitted through a signal transmission line, a reference plane voltage terminal connected to a refence plane as a refence for the signal on the signal transmission line and a voltage generating circuit configured to generate a refence plane voltage to be supplied to the reference plane voltage terminal based on the signal received by the receiving terminal.