Reference Potential Generating Circuit DC Current Reduction
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Solution Overview
Problem
The existing reference potential generating circuits in semiconductor memory devices consume a significant amount of DC current, which contributes to increased power consumption during the self-refresh operation, especially in mobile devices, and also face instability issues in generating a stable output reference potential.
Innovation Solution
A reference potential generating circuit with a control mechanism that includes switches to manage power supply to the current mirror amplifier and monitoring portion, allowing for a stop state to reduce DC current consumption and ensuring stable output potentials by controlling the activation and deactivation of these components based on predetermined periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the reference potential generating circuit operates continuously to maintain stable output reference potential, then the stability of output reference potential is improved, but the DC current consumption increases
Solution Approach 1:
The reference potential generating circuit operates periodically rather than continuously. A control signal causes the circuit to alternate between active periods (generating stable reference potential) and inactive periods (reducing current consumption to near zero), achieving both stability during operation and energy savings overall
Solution Approach 2:
The operating state of the reference potential generating circuit is made dynamic rather than static. The circuit transitions between active and inactive states based on control signals, allowing the system to adapt its power consumption level while maintaining reference potential stability when needed
2Use of energy by moving object
If the refresh operation cycle is extended to reduce self-refresh current, then the DC current consumption decreases, but the data retention reliability deteriorates
Solution Approach 1:
The refresh operation uses periodic activation of the reference potential generating circuit synchronized with the refresh timing. By concentrating current consumption into brief active periods during refresh operations rather than continuous operation, the circuit achieves data retention reliability while significantly reducing average DC current consumption
Data Source
AI summary
A reference potential generating circuit has a current mirror amplifier (CM11) supplied with an input reference potential and a feedback level, an output transistor (QP11) supplied with an output of the current mirror amplifier as an input and producing an output reference potential as an output, a monitoring portion (R11 and R12) for generating the feedback level from the output of the output transistor, a first switch (QN11) for controlling supply of a power supply potential (VSS}) to the current mirror amplifier, a second switch (QN12) for controlling supply of the power supply potential (VSS) to the monitoring portion, and an output switch (TSW12) for controlling connection of the output of the output transistor to a next stage. The first and the second switches and the output switch are simultaneously turned off. When a first predetermined period elapses after the first and the second switches and the output switch are turned off, the first and the second switches are turned on. When a second predetermined period elapses after the first and the second switches are turned on, the output switch is turned on.