Reference Signal Buffering for Low-Power Voltage Regulation

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Solution Overview

Problem

Existing voltage regulation circuits face challenges in optimizing power consumption and efficiency due to complex designs and high costs, particularly in analog and mixed-signal circuits where predicting instantaneous current draw is difficult, leading to tradeoffs in voltage regulation performance.

Innovation Solution

A device and method that generate multiple replicas of a reference signal with different performance characteristics, allowing for independent configuration of accuracy, output impedance, and bandwidth, using a regulator circuit with sub-blocks and charge sharing operations to optimize voltage regulation, enabling flexible and cost-effective power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a voltage regulator is designed with high bandwidth and current sourcing capability to track load changes, then voltage regulation accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvevoltage regulation accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The voltage regulator is divided into multiple parallel LDO regulator circuits, each dedicated to regulating a specific output voltage. This segmentation allows each regulator to be optimized for its specific function, improving overall regulation accuracy while enabling independent power management for each output channel.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic power management by enabling or disabling individual LDO regulator circuits based on real-time detection of load current draw. When a particular output voltage is not needed, its corresponding LDO regulator is disabled, reducing power consumption while maintaining voltage regulation accuracy when needed.

Inventive Principle:
Principle #15Dynamics

2Reliability

If multiple parallel LDO regulators are used to provide regulated voltages, then voltage regulation performance is improved, but device complexity and cost increase

Engineering Contradiction:
Improvevoltage regulation performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs universal LDO regulator circuit blocks that can be configured to provide different output voltages by adjusting external components. This multi-functionality allows the same regulator topology to serve multiple purposes, reducing overall device complexity while maintaining reliable voltage regulation across multiple output channels.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent achieves different output voltages and performance characteristics by changing external component parameters (resistors, capacitors) rather than designing entirely different regulator circuits. This approach simplifies the overall device complexity while maintaining reliable voltage regulation performance across multiple outputs.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If the output voltage of SMPS is optimized to reduce LDO power consumption, then overall power efficiency is improved, but measurement and control complexity increases

Engineering Contradiction:
Improvepower efficiencyVSAvoidmeasurement complexity
Core Design Contradiction:
Loss of energyVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements a feedback mechanism using a multiplexer and ADC to sample output voltages from multiple LDO regulators, compare them against stored limits, and generate alerts when thresholds are exceeded. This feedback system enables real-time monitoring and optimization of power efficiency while managing measurement complexity through automated comparison and alerting.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces a digital processor as an intermediary that mediates between the physical LDO regulators and the monitoring system. The processor reads voltage values through the ADC interface, compares them against pre-stored limits in memory, and generates alerts, thereby simplifying the overall measurement and control process while enabling power efficiency optimization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11637554B2Device and method for enhancing voltage regulation performance
Publication Date: 2023.04.25 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US11637554B2 patent drawing
  • US11637554B2 patent drawing
  • US11637554B2 patent drawing

AI summary

A device for buffering a reference signal comprises a regulator circuit configured to generate at least two replicas of the reference signal as regulated output signals. The device further comprises a receiving circuit configured to receive the regulated output signals in a switchable manner. In this context, the regulated output signals are configured to have different performance characteristics.