Reference Voltage Generation Circuit with Biasing and Compensation Blocks
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Solution Overview
Problem
Conventional reference voltage generation circuits in semiconductor devices have complex circuit structures, making them occupy more space and fail to maintain a uniform voltage level across variations in process, voltage, and temperature (PVT).
Innovation Solution
A reference voltage generation circuit with a simple circuit structure, comprising a loading block for generating reference and mirroring currents, a biasing block for generating bias voltages responsive to power source and temperature variations, a compensation block for stabilizing the reference current, and an output load block for generating a stable reference voltage, utilizing PMOS and NMOS transistors operating in saturation and linear regions respectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional band gap reference (BGR) circuit is used to generate reference voltage, then the reference voltage can be generated, but the circuit structure becomes complicated and occupies more area
Solution Approach 1:
The reference voltage generation circuit is divided into distinct functional blocks: a loading block that generates reference current, a biasing block that generates bias voltages, and a compensation block that stabilizes the reference current. This segmentation allows each block to perform its specific function with simpler circuitry, reducing overall complexity while maintaining reliability.
Solution Approach 2:
The patent extracts and eliminates unnecessary components from conventional BGR circuits. By using a simplified loading block with PMOS transistors and a streamlined compensation block, the design removes redundant elements while preserving the core reference voltage generation functionality, thus reducing circuit complexity and area occupation.
2Reliability
If a conventional BGR circuit is used, then reference voltage can be generated, but the circuit occupies more area in the semiconductor device
Solution Approach 1:
The patent merges multiple functions into compact integrated blocks. The loading block combines current generation and mirroring functions, while the compensation block integrates temperature and voltage compensation mechanisms. This merging reduces the total area required compared to conventional designs that separate these functions into distinct components.
Solution Approach 2:
The biasing block generates multiple bias voltages (first bias voltage for power source variation, second bias voltage for temperature variation) that serve multiple compensation purposes simultaneously. This multi-functionality allows a single block to handle various compensation needs, reducing the overall circuit area required.
3Reliability
If conventional reference voltage generation is used, then voltage can be generated, but the voltage level varies with PVT (process, voltage, temperature) variations
Solution Approach 1:
The compensation block implements feedback mechanisms where the first bias voltage adjusts the reference current in response to power source voltage variations, and the second bias voltage adjusts for temperature variations. This feedback ensures that the reference voltage remains stable and uniform despite PVT variations, maintaining voltage composition stability.
Solution Approach 2:
The patent changes key parameters dynamically through bias voltages. The first bias voltage modifies the operating point of PMOS transistors to compensate for power source variations, while the second bias voltage adjusts parameters to compensate for temperature effects. These parameter changes maintain voltage uniformity across varying conditions.
Data Source
AI summary
A reference voltage generation circuit includes a loading block suitable for generating a reference current and first and second mirroring currents obtained by mirroring the reference current based on a power source voltage, a biasing block suitable for generating a first bias voltage controlled corresponding to variations in the power source voltage and a second bias voltage controlled corresponding to variations in temperature based on the first mirroring current, a compensation block suitable for compensating for the reference current based on the first and second bias voltages, and an output load block suitable for generating a reference voltage which corresponds to the reference current based on the second mirroring current.