Reference Voltage Generating Circuit Using Segmented Capacitors
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Solution Overview
Problem
Conventional reference voltage generating circuits for ADC and DAC require additional operational clocks, increasing complexity and limiting the use of high sampling frequencies due to the need for a single capacitor to both sample and generate the reference voltage.
Innovation Solution
A reference voltage generating circuit using two capacitors and three switches, where one capacitor samples the external voltage and another generates the reference voltage, allowing the original operational clock to be used without the need for additional clocks, forming an RC filtering circuit to filter noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single capacitor is used to both sample the external voltage and generate the reference voltage, then the circuit structure is simplified, but additional operational clocks are required which increases circuit complexity and limits high sampling frequency operation
Solution Approach 1:
The patent divides the single capacitor function into two separate capacitors: a first capacitor dedicated to sampling the external voltage and a second capacitor dedicated to generating the reference voltage. This segmentation allows each capacitor to operate independently with its own timing, eliminating the need for additional operational clocks and enabling high sampling frequency operation.
Solution Approach 2:
The first capacitor acts as an intermediary element that temporarily stores the sampled external voltage before transferring it to the second capacitor for reference voltage generation. This intermediary role allows the sampling operation and reference voltage generation to be decoupled in time, resolving the clock synchronization issue.
2Quantity of substance
If a single capacitor is used for both sampling and reference voltage generation, then component count is reduced, but two additional operational clocks must be generated
Solution Approach 1:
By segmenting the capacitor functions into two separate components (first capacitor for sampling, second capacitor for reference voltage generation), the patent eliminates the need for complex multi-clock generation logic. Each capacitor operates on the same clock signal at different phases, simplifying the clocking architecture.
Solution Approach 2:
Both capacitors can be controlled by the same operational clock signal, making the clocking system universal rather than requiring separate dedicated clocks for each operation. The switches controlling each capacitor are timed to operate at different phases of the same clock cycle.
3Area of stationary object
If the same capacitor is used in both stages, then the circuit is more compact, but the operational clock does not correspond to the sampling stages requiring additional clocks
Solution Approach 1:
The patent segments the capacitor functions spatially and temporally: the first capacitor handles sampling during one phase of the clock cycle, while the second capacitor handles reference voltage generation during another phase. This segmentation allows straightforward clock synchronization without complex timing logic.
Solution Approach 2:
The first capacitor performs the sampling action preliminarily before the second capacitor generates the reference voltage. This preliminary action is completed during the first phase of the clock cycle, preparing the voltage for the subsequent reference voltage generation phase, making the overall operation easier to synchronize.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces circuit complexity and enables the use of high sampling frequencies by separating the sampling and voltage generation stages, providing a clean reference voltage while maintaining operational efficiency.
Implementation Method 1
a first capacitor; a second capacitor; a reference voltage sampling capacitor
Implementation Method 2
The capacitor CREF redistributes charges with the external capacitor COFF
Implementation Method 3
The first stage and the second stage are alternatively performed such that the capacitor CREF acts as a resistor. Therefore, the reference voltage generating circuit 100 can be regarded as an RC filtering circuit utilized to filter out noises of the external voltage source
Data Source
AI summary
A reference voltage generating circuit includes: a first capacitor; a second capacitor; a reference voltage sampling capacitor; a first switch for alternatively coupling the second capacitor to a predetermined voltage to allow the second capacitor to sample the predetermined voltage; a second switch for alternatively coupling the second capacitor to the first capacitor to allow the second capacitor to redistribute charges with the first capacitor in order to generate the reference voltage; and a third switch for alternatively coupling the first capacitor to the reference voltage sampling capacitor to allow the reference voltage sampling capacitor to redistribute charges with the first capacitor in order to output the reference voltage.