Reference Voltage Pre-Settling Circuit for Faster Chip Wake-Up

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Solution Overview

Problem

In shrinking semiconductor devices, reference voltage generators like band gap reference circuits and low-dropout regulators face challenges with slow OP-amp output settling times during chip power-up, leading to prolonged power-up times and increased power consumption due to heavy RC loads.

Innovation Solution

An OP-amp output pre-settling scheme is introduced, where a pre-settling circuit actively settles the OP-amp output to a threshold drop before stabilization, incorporating a self-control mechanism for power saving and stability, which can be turned off once internal voltages reach a target level, thereby shortening chip wake-up time and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a pre-settling circuit is added to actively settle the OP-amp output, then the settling time is reduced, but the device complexity increases

Engineering Contradiction:
Improvesettling timeVSAvoidcircuit complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The pre-settling circuit performs preliminary action by actively settling the OP-amp output voltage before the main stabilization phase. The circuit detects when the output voltage reaches a threshold drop and pre-establishes the settled state, eliminating the need for lengthy passive RC time constant settling and reducing overall power-up time.

Inventive Principle:
Principle #10Preliminary action

2Speed

If the pre-settling circuit is kept active continuously, then the settling speed is maintained, but the power consumption increases

Engineering Contradiction:
Improvesettling speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The pre-settling circuit operates periodically rather than continuously. It activates during power-up to perform the settling function, then automatically turns off once the output voltage reaches the threshold drop. This periodic operation maintains fast settling capability when needed while minimizing power consumption during normal operation.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The circuit incorporates feedback mechanisms that monitor the OP-amp output voltage and detect when it reaches the threshold drop. This feedback control enables the pre-settling circuit to know when settling is complete and when to deactivate, ensuring fast settling performance while avoiding unnecessary continuous operation that would waste power.

Inventive Principle:
Principle #23Feedback

3Stability of the object's composition

If the OP-amp output is allowed to settle naturally with heavy RC loads, then the circuit stability is maintained, but the power-up time increases

Engineering Contradiction:
Improvecircuit stabilityVSAvoidpower-up time
Core Design Contradiction:
Stability of the object's compositionVSDuration of action of moving object

Solution Approach 1:

The pre-settling circuit performs preliminary action by actively settling the OP-amp output voltage before the main stabilization phase. The circuit detects when the output voltage reaches a threshold drop and pre-establishes the settled state, eliminating the need for lengthy passive RC time constant settling and reducing overall power-up time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pre-settling circuit acts as an intermediary between the OP-amp output and the final stabilization stage. It provides an intermediate settled state with threshold drop that bridges the gap between initial power-up and final stable operation, enabling faster transition while maintaining circuit stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12164320B2Reference voltage generation
Publication Date: 2024.12.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12164320B2 patent drawing
  • US12164320B2 patent drawing
  • US12164320B2 patent drawing

AI summary

A reference voltage generator includes an input terminal configured to receive an enable signal and an output terminal configured to provide an output signal. A voltage generator circuit is arranged to generate a first output voltage signal, and a pre-settling circuit is arranged to generate a second output voltage. The pre-settling circuit is configured to provide the second output voltage signal at the output terminal in response to the enable signal received at the input terminal, and following a first time period provide the first output voltage at the output terminal.