Reference Voltage Training Circuit for Semiconductor Data Reception
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Solution Overview
Problem
Semiconductor circuits face challenges in maintaining optimal data receiving performance due to noise factors like channel loss, skew, and Inter Symbol Interference, which affect the accuracy of reference signals used for data transmission.
Innovation Solution
A reference voltage training circuit that includes a normal buffer, a calibration signal generation circuit, and a reference voltage generation circuit to calibrate the reference voltage based on phase comparisons of differential signals, ensuring accurate data reception by adjusting the reference voltage level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reference voltage is used for data reception, then data transmission can be performed, but data receiving performance deteriorates due to noise from channel loss, skew, cross-talk and ISI
Solution Approach 1:
The patent applies preliminary action by performing reference voltage calibration before actual data reception. The calibration signal generation circuit generates calibration signals and compares phases in advance to determine the optimal reference voltage level, so that when data reception occurs, the reference voltage is already optimized to compensate for channel noise effects.
Solution Approach 2:
The patent implements feedback through the phase comparison mechanism. The calibration signal generation circuit compares the phase of calibration signals with received signals, and this phase difference information feeds back to adjust the reference voltage level, creating a closed-loop system that continuously optimizes performance based on actual channel conditions.
2Measurement precision
If reference voltage level is fixed, then circuit design is simplified, but data receiving accuracy deteriorates under varying channel conditions
Solution Approach 1:
The patent applies dynamics by transitioning from a fixed reference voltage to a dynamically adjustable one. The reference voltage generation circuit can modify the reference voltage level based on phase comparison results from the calibration process, allowing the system to adapt to varying channel conditions while maintaining reception accuracy.
Solution Approach 2:
The patent implements parameter changes by adjusting the reference voltage level parameter based on measured phase differences. The calibration process determines the optimal reference voltage parameter value, and the generation circuit modifies this parameter to match actual channel characteristics, thereby improving measurement precision.
3Reliability
If phase comparison is performed to calibrate reference voltage, then data receiving performance improves, but circuit complexity increases due to additional calibration circuits
Solution Approach 1:
The patent applies universality by designing the calibration signal generation circuit to perform multiple functions: it generates calibration signals, compares phases, and determines optimal reference voltage levels. This multi-functional approach consolidates what could be separate circuits into a unified calibration system, reducing overall complexity while maintaining performance benefits.
Data Source
AI summary
A reference voltage training circuit may include: a normal buffer configured to generate a first received signal by receiving one of differential signals based on the other; a calibration signal generation circuit configured to generate a second received signal by receiving the one of the differential signals according to a reference voltage, and generate reference voltage calibration signals by comparing the phase of the second received signal to the phase of the first received signal; and a reference voltage generation circuit configured to calibrate the level of the reference voltage according to the reference voltage calibration signals.


