Refined Hard-Bit Read Voltage Using Soft-Bit Decoding in Nonvolatile Memory
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Solution Overview
Problem
Non-volatile memory devices face challenges in accurately reading data due to bit error rates that increase over time, leading to failures in hard bit decoding operations, which can result in quality of service issues and inefficiencies in data retrieval.
Innovation Solution
Adjusting the hard bit read voltage based on soft bit decoding operations to refine the read voltage, using constructed data from multiple read operations and XOR operations to minimize errors without additional physical reads, thereby improving decoding accuracy and reducing bit error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hard bit decoding is performed using fixed read voltages, then the decoding process is simple and fast, but bit error rates increase over time leading to decoding failures
Solution Approach 1:
The patent performs soft bit decoding operations before final hard bit decoding to preliminarily identify and correct potential bit errors. This preliminary action using constructed data and XOR operations prepares the data in advance, allowing the subsequent hard bit decoding to proceed more accurately without requiring complex iterative adjustments during the main decoding process.
Solution Approach 2:
The patent introduces constructed data as an intermediary element that combines information from multiple read operations. This constructed data acts as a mediator between the raw read data and the final decoded output, enabling more reliable hard bit decoding by providing additional contextual information without requiring direct modification of the decoding algorithm itself.
2Reliability
If multiple read operations are performed to improve read accuracy, then bit error rates decrease, but computing resources and power consumption increase
Solution Approach 1:
The patent creates constructed data as a virtual copy that synthesizes information from multiple read operations without requiring additional physical reads. By generating this intermediary constructed data through XOR operations on existing read data, the system achieves the benefits of multiple reads while avoiding the proportional increase in power consumption that would result from actually performing multiple physical read operations.
Solution Approach 2:
The patent changes the parameter representation of read data by transforming multiple physical read results into a different format (constructed data with XORed bits). This parameter transformation allows the system to utilize information from multiple reads in a computationally efficient manner, reducing the need for repeated high-power physical read operations while maintaining improved read accuracy.
3Reliability
If soft bit decoding is performed to correct bit errors, then decoding accuracy improves, but the processing time and computational overhead increase
Solution Approach 1:
The patent performs soft bit decoding and constructed data generation as a preliminary step before final hard bit decoding. By identifying and marking potential bit errors in advance using XOR operations on constructed data, the system prepares the data structure optimally for the subsequent hard bit decoding phase, reducing the need for time-consuming iterative corrections during the main decoding process.
Solution Approach 2:
The patent segments the decoding process into distinct phases: first performing soft bit analysis on constructed data to identify potential errors, then using those results to guide the hard bit decoding process. This segmentation allows each phase to be optimized independently, with the soft bit phase handling probabilistic error identification and the hard bit phase handling definitive correction, thereby reducing overall processing time.
Data Source
AI summary
In some implementations, a storage device may perform a read operation to obtain data stored on the storage device performing a decoding operation on the data. The storage device may identify a refined hard bit read voltage based on constructed data. The storage device may apply the refined hard bit read voltage. In some aspects, the storage device may use the refined hard bit read voltage to determine bit values of the storage device in a subsequent decoding operation associated with a subsequent read operation.