Reflective Layer for Ferroelectric Capacitor Alignment
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Solution Overview
Problem
The challenge in aligning photolithographic patterns on integrated circuits with topographical alignment marks covered by low reflectivity layers, which hinders accurate measurement due to reduced reflectivity, necessitating an improved alignment method.
Innovation Solution
A reflective layer is formed over the topographical alignment marks, using materials like titanium aluminum (TiAl) or high electrical resistivity materials, to enhance reflectivity and facilitate accurate position measurement during photolithographic alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a low reflectivity layer is formed over topographical alignment marks, then the IC structure is completed with functional layers, but the reflectivity of the alignment marks is reduced making measurement problematic
Solution Approach 1:
The patent applies local quality by selectively removing the low reflectivity layer only in the regions where alignment marks are located, while preserving the low reflectivity layer in other functional areas of the IC. This creates localized high reflectivity zones that enable accurate alignment measurement without compromising the overall IC structure and functionality.
Solution Approach 2:
The patent extracts the low reflectivity layer material from specific regions to expose the underlying topographical alignment marks. By removing the low reflectivity layer in alignment mark areas, the high reflectivity of the alignment marks is restored, enabling optical measurement systems to detect position accurately.
2Measurement precision
If the low reflectivity layer is removed to restore reflectivity, then alignment measurement is improved, but the completed IC structure is modified
Solution Approach 1:
The patent modifies the IC structure locally rather than globally by selectively removing the low reflectivity layer only in alignment mark regions. This minimal modification approach restores measurement precision while maintaining the integrity and functionality of the completed IC structure in all other areas.
3Measurement precision
If a reflective layer is formed over the entire IC surface, then alignment signal strength is increased, but subsequent processing becomes more complex
Solution Approach 1:
The patent confines the reflective layer formation to specific alignment mark regions rather than applying it across the entire IC surface. This selective approach increases alignment signal strength where needed while minimizing interference with subsequent processing steps and reducing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The reflective layer enables more accurate alignment of photolithographic patterns by increasing reflectivity, allowing for precise measurement of the integrated circuit's position, thereby improving the alignment process.
Implementation Method 1
Light is reflected from the topographical alignment marks to measure the position of the IC
Data Source
AI summary
An improved alignment structure for photolithographic pattern alignment is disclosed. A topographical alignment mark in an IC under a low reflectivity layer may be difficult to register. A reflective layer is formed on top of the low reflectivity layer so that the topography of the alignment mark is replicated in the reflective layer, enabling registration of the alignment mark using common photolithographic scanners and steppers. The reflective layer may be one or more layers, and may be metallic, dielectric or both. The reflective layer may be global over the entire IC or may be local to the alignment mark area. The reflective layer may be removed during subsequent processing, possibly with assist from an added etch stop layer, or may remain in the completed IC. The disclosed alignment mark structure is applicable to an IC with a stack of ferroelectric capacitor materials.