In Situ Reflectometer Metrology for Multi-Layer Deposition Thickness
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in accurately measuring individual layer thickness during multi-layer deposition, particularly in Vertically Integrated Memory (VIM) applications like V-NAND, where many layers alternate between oxide and nitride, making non-destructive full stack thickness measurement unreliable and time-consuming, and existing optical methods are prone to errors due to patterned substrate features.
Innovation Solution
In situ wafer metrology using a reflectometer metrology apparatus integrated with a plasma enhanced chemical vapor deposition system, where the wafer is aligned to ensure the optical metrology spot aligns with an unpatterned central region of the die, allowing real-time measurement and monitoring of each deposited layer thickness through a purged optical channel routed through a gas injection hole in the showerhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If non-destructive methods are used to measure full stack thickness, then measurement reliability is improved, but measurement time increases and accuracy deteriorates due to the large number of layers
Solution Approach 1:
The patent segments the multi-layer deposition process into individual layer measurements. Instead of measuring the entire stack at once, the system measures each layer thickness separately as it is deposited, using a reflectometer to obtain individual layer thickness data point by point throughout the deposition process.
Solution Approach 2:
The patent performs preliminary alignment of the wafer before deposition begins. The wafer is aligned in the processing station such that the optical metrology spot will align with an unpatterned central region of the die during deposition, preventing measurement errors before they occur.
2Area of stationary object
If optical metrology is conducted on patterned substrate regions, then measurement coverage is improved, but measurement accuracy deteriorates due to optical inference from pattern features
Solution Approach 1:
The patent extracts the measurement location from the patterned regions and places it in the unpatterned central region of the die. By taking the metrology spot away from areas with pattern features that cause optical inference, the system eliminates measurement errors while still monitoring the deposition process.
Solution Approach 2:
The unpatterned central region of the die serves as an intermediary measurement location. This region acts as a mediator that allows optical metrology to be performed without the interference of pattern features, providing accurate thickness measurements that can be used to infer deposition quality across the entire wafer.
3Productivity
If integrated in situ metrology is implemented, then measurement speed is improved, but device complexity increases
Solution Approach 1:
The patent merges the metrology system with the deposition tool by integrating a reflectometer into the deposition chamber. This combination allows real-time, in situ measurement of layer thickness during the deposition process, eliminating the need for separate post-deposition metrology steps and significantly improving measurement speed.
4Device complexity
If separate post-deposition metrology is used, then device complexity is reduced, but measurement time increases and productivity decreases
Solution Approach 1:
The patent implements continuous measurement during the deposition process rather than performing discrete post-deposition measurements. The reflectometer continuously monitors layer thickness as the deposition progresses, providing real-time feedback without interrupting the deposition workflow, thereby maintaining high productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable and efficient measurement of each successive layer thickness during multi-layer deposition, improving the accuracy and efficiency of V-NAND multilayer stack depositions by avoiding pattern-related optical inference and allowing for rapid problem detection.
Implementation Method 1
A wafer to be processed is positioned in a processing station of a deposition process tool, the process tool having a reflectometer metrology apparatus for optically determining thickness of a deposited layer on the wafer
Implementation Method 2
The apparatus includes a plasma enhanced chemical vapor deposition system for performing at least one of oxide/nitride (ONON) and oxide/polysilicon (OPOP) film stack deposition
Data Source
AI summary
In situ wafer metrology is conducted to reliably obtain deposition thickness for each successive layer in a multi-layer deposition. A wafer to be processed is positioned in a processing station of a deposition process tool, the process tool having a reflectometer metrology apparatus for optically determining thickness of a deposited layer on the wafer. Prior to commencing a deposition, the wafer is aligned in the processing station such that an optical metrology spot generated by the reflectometer metrology apparatus will align with an unpatterned central region of a die on a wafer during a deposition conducted on the wafer in the tool. Thereafter, the thickness of a deposited layer on the wafer is reliably measured and monitored in situ.