Reflectometry Test System Using Sliding Pseudo-Noise Reference
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Solution Overview
Problem
Existing reflectometry systems are bulky, power-intensive, and primarily designed for off-line testing, making them unsuitable for low-power and integrated circuit implementations, and they struggle to detect intermittent faults due to interference with operational signals.
Innovation Solution
A reflectometry system that generates pseudo-noise sequences at a chip rate, allowing for sub-chip time resolution by correlating responses with a sliding pseudo-noise reference sequence, enabling live testing without interfering with operational signals and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If traditional reflectometry instruments include operator displays and line current power supplies, then visual interpretation capability is provided, but device size and power consumption increase significantly
Solution Approach 1:
The patent replaces traditional mechanical/electronic display systems with a digital signal processing approach. The correlation function is computed and analyzed electronically to identify fault locations, eliminating the need for bulky operator displays while maintaining interpretation capability through digital signal analysis.
Solution Approach 2:
The invention uses pseudo-noise sequences as test signals that can be generated and processed digitally. The correlation between the transmitted sequence and received signal is computed to create a digital representation of the signal path characteristics, replacing physical display mechanisms with digital signal copies and analysis.
2Power
If traditional reflectometry systems use high power consumption components, then adequate signal processing capability is achieved, but integration into low-power systems becomes impractical
Solution Approach 1:
The patent changes the operating parameters of the reflectometry system by using pseudo-noise sequences with specific autocorrelation properties. This allows the system to achieve adequate signal-to-noise ratio and fault detection capability at lower power levels, making integration into power-constrained systems practical.
3Reliability
If off-line testing is performed to avoid interference with operational signals, then signal integrity is maintained, but intermittent faults cannot be detected
Solution Approach 1:
The patent employs periodic transmission of pseudo-noise sequences that are synchronized with the operational system. The periodic nature of the test signal allows it to coexist with operational signals while maintaining detectability through correlation processing, enabling live testing without disrupting normal operations.
Solution Approach 2:
The pseudo-noise sequence acts as an intermediary test signal that can be superimposed on operational signals. The unique autocorrelation properties of the pseudo-noise sequence allow it to serve as a marker that can be distinguished from operational signals, enabling simultaneous operation and testing.
4Measurement precision
If test signals are injected into the signal path during operational testing, then real-time fault detection is enabled, but interference with operational signals occurs
Solution Approach 1:
The patent converts the potential harm of signal interference into a benefit by using the pseudo-noise sequence's unique autocorrelation properties. The test signal's correlation peak allows it to be distinguished from operational signals even when superimposed, transforming the interference problem into a detectable feature through correlation processing.
Data Source
AI summary
A technique for reflectometry testing of a signal path is disclosed. The technique includes injecting a test signal based on a probe pseudo-noise sequence into the signal path and obtaining a response signal. A sliding reference pseudo-noise sequence is correlated against the response signal. Both the probe sequence and the reference sequence are generated at a chip rate. The correlation is obtained for integer chip time delays, and sub-chip resolution of a peak correlation delay is estimated from at least two samples of the correlation.