Reflow Patterning Resist Sidewall Roughness Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor devices are miniaturized, lithography processes become increasingly challenging, making it difficult to form reliable devices at smaller sizes due to issues with sidewall roughness and critical dimension control in patterning processes.

Innovation Solution

A method involving a multi-layer resist structure with a silicon-containing middle layer and a top resist layer, where the top surface is treated with a compound to increase the contact angle, allowing for reflow to reduce sidewall roughness and prevent scum formation, thereby improving the sidewall profile and critical dimension during etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If lithography processes are used to form semiconductor devices at smaller sizes, then device integration level is improved, but sidewall roughness increases making reliable device formation difficult

Engineering Contradiction:
Improvedevice integration levelVSAvoidsidewall roughness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by treating the silicon-containing layer with a compound before the reflow process to increase its contact angle. This pre-treatment prevents scum formation during reflow and enables effective sidewall roughness reduction, allowing high integration with improved manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the contact angle parameter of the silicon-containing layer from a lower value to a higher value (greater than 90 degrees) through chemical treatment. This parameter change fundamentally alters the layer's interaction with the resist during reflow, enabling roughness reduction while maintaining pattern fidelity at scaled dimensions

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If reflow process is performed on patterned resist layer to reduce sidewall roughness, then line edge roughness is improved, but scum formation occurs on the lower portion of the patterned resist layer

Engineering Contradiction:
Improveline edge roughnessVSAvoidscum formation
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by treating the silicon-containing layer to increase its contact angle before reflow. This creates a surface that repels the resist material, preventing scum formation at the interface while allowing the upper resist portions to reflow and smooth the sidewalls

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent creates local quality differentiation by treating only the silicon-containing layer with the compound to increase its contact angle, while leaving the resist layer composition unchanged. This localized modification enables scum prevention at the interface without affecting the reflow-induced sidewall smoothing of the resist pattern

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces sidewall roughness and prevents scum formation, leading to improved line edge and line width roughness, resulting in enhanced sidewall profiles and critical dimension accuracy in semiconductor devices.

Implementation Method 1

The top surface of the silicon-containing layer uncovered by the patterned resist layer is reacted with a treating compound, so that the exposed top surface of the silicon-containing layer has a second contact angle that is greater than the first contact angle

Methodology Applied
Scientific EffectContact angle change: Wetting

Implementation Method 2

the patterned resist layer can be reflowed to reduce the sidewall roughness of the patterned resist layer

Methodology Applied
Scientific EffectReflow: Heating

Data Source

PatentUS10879078B2Method of patterning resist layer and method of forming semiconductor structure using patterned resist layer
Publication Date: 2020.12.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10879078B2 patent drawing
  • US10879078B2 patent drawing
  • US10879078B2 patent drawing

AI summary

A method of patterning a resist layer is provided. The method includes forming the resist layer over the top surface of a silicon-containing layer that has a first contact angle. The method also includes exposing and developing the resist layer to form a patterned resist layer and expose a portion of the top surface of the silicon-containing layer. The method also includes applying a treating compound to the exposed portion of the top surface of the silicon-containing layer, so that the exposed portion of the top surface has a second contact angle that is greater than the first contact angle. The method also includes reflowing the patterned resist layer over the top surface of the silicon-containing layer having the second contact angle.