Refresh Address Masking Circuit for Defective Word Line Protection
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Solution Overview
Problem
Conventional semiconductor memory devices face issues with defective word lines being refreshed during memory refresh cycles, leading to potential errors or damage due to the inability to quickly determine if a refresh address is associated with defective word lines, which can operate outside specifications.
Innovation Solution
Implementing a refresh address masking circuit that generates and compares a refresh address to programmed selected addresses, preventing refresh operations on identified defective word lines by providing a refresh stop signal if a match is found, thus masking the defective word lines and preventing their activation during refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional refresh operations are performed on all word lines, then memory refresh coverage is complete, but defective word lines may be activated causing errors or damage
Solution Approach 1:
The refresh operation is segmented into two distinct paths: a normal refresh path for healthy word lines and a masked path for defective word lines. The refresh control circuit divides the word line address space into safe addresses and defective addresses, applying different refresh strategies to each segment, thereby preventing defective line activation while maintaining overall refresh effectiveness.
Solution Approach 2:
A refresh mask circuit is introduced as an intermediary component between the refresh control logic and the word line selection logic. This mask circuit receives the refresh address and defective address information, performs comparison, and generates a mask signal that selectively blocks refresh operations to defective word lines, thus preventing errors without requiring complete redesign of the refresh mechanism.
2Reliability
If defective word lines are masked during refresh, then errors from defective lines are prevented, but refresh operations cannot be performed on all word lines
Solution Approach 1:
The system performs preliminary identification and masking of defective word line addresses before the actual refresh operation begins. By pre-loading defective addresses into the mask circuit and pre-comparing them against the refresh address sequence, the system prepares the masking mechanism in advance, allowing defective lines to be skipped without interrupting the overall refresh timing and maintaining refresh efficiency.
Solution Approach 2:
The refresh control circuit is designed to automatically skip over defective word lines by detecting mask signals and advancing to the next valid address without executing refresh operations on defective lines. This skipping mechanism allows the refresh process to maintain its timing sequence while efficiently bypassing problematic addresses, minimizing impact on overall refresh productivity.
3Measurement precision
If refresh address comparison with defective addresses is performed, then defective word lines can be identified, but determination speed may be insufficient to prevent activation
Solution Approach 1:
The patent replaces complex sequential comparison logic with dedicated hardware comparison circuits that perform parallel address matching. Instead of using software or sequential logic to compare refresh addresses against defective addresses, the system employs combinatorial logic circuits that simultaneously evaluate multiple address bits, achieving high-speed comparison that meets the timing requirements for preventing defective line activation.
Solution Approach 2:
The comparison circuit is designed to change its operational parameters by accepting partial or truncated address inputs depending on the refresh mode. By flexibly adjusting which address bits are compared and how the comparison result is interpreted, the circuit optimizes its operation speed while maintaining accurate identification of defective addresses across different refresh scenarios.
Data Source
AI summary
Apparatuses, systems, and methods for refresh address masking. A memory device may refresh word lines as part of refresh operation by cycling through the word lines in a sequence. However, it may be desirable to avoid activating certain word lines (e.g., because they are defective). Refresh masking logic for each bank may include a fuse latch which stores a selected address associated with a word line to avoid. When a refresh address is generated it may be compared to the selected address. If there is a match, a refresh stop signal may be activated, which may prevent refreshing of the word line(s).