Refresh Control Circuit for DRAM Bank Group Segmentation
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Solution Overview
Problem
DRAM semiconductor memory devices experience high peak current and unstable operation due to simultaneous activation of all memory banks during refresh operations, leading to excessive power consumption.
Innovation Solution
A refresh control circuit that activates bank selection signals in response to a refresh command signal, allowing for selective activation of bank groups during refresh cycles, reducing peak current by distributing the refresh operation across multiple bank groups.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If all memory banks are simultaneously activated during refresh operation, then refresh operation is completed, but peak current becomes excessively large causing operational instability
Solution Approach 1:
The memory banks are divided into multiple bank groups, and the refresh operation is segmented to be performed on different bank groups at different times. This segmentation prevents simultaneous activation of all banks, thereby reducing peak current while ensuring complete refresh coverage across all memory banks.
2Productivity
If all memory banks are simultaneously activated during refresh operation, then refresh operation is completed, but power consumption becomes excessively large
Solution Approach 1:
The refresh operation is segmented across multiple bank groups with staggered timing. By activating only a subset of bank groups at each refresh cycle rather than all banks simultaneously, the instantaneous power consumption is significantly reduced while the complete refresh set is achieved over multiple cycles.
3Adaptability or versatility
If refresh cycles are fixed at 4K or 8K times per 64 ms, then refresh operation is standardized, but peak current problems occur due to simultaneous bank activation
Solution Approach 1:
The refresh control is made dynamic by introducing a bank group selection signal that can be adjusted based on operational conditions. This allows the system to adapt the refresh pattern dynamically, selecting different bank groups for refresh in different cycles, thereby maintaining the standardized refresh rate while avoiding simultaneous activation of all banks.
Data Source
AI summary
A refresh control circuit is capable of activating a plurality of bank selection signals in response to a refresh command signal. Each of the plurality of bank selection signals is assigned to one of a plurality of bank groups. The refresh control circuit is configured to activate the plurality of bank selection signals when a refresh cycle selection signal is deactivated, and activate a part of the plurality of bank selection signals when the refresh cycle selection signal is activated.