Refresh Control Circuit for Semiconductor Memory Row Hammering
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Solution Overview
Problem
The Row Hammering effect in semiconductor memory devices causes data loss due to increased activation of certain word lines, which existing refresh operations fail to address effectively, leading to premature data deterioration in high-density memory devices.
Innovation Solution
A refresh control circuit that performs a target refresh operation by counting active signals between neighboring refresh signals and generating specific refresh and row hammering activating signals to detect and address the Row Hammering effect, thereby extending data retention time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If normal refresh operations are performed on all word lines, then data retention is maintained, but power consumption increases and Row Hammering effect cannot be prevented
Solution Approach 1:
The patent applies local quality by performing refresh operations selectively on specific word lines that are adjacent to actively used word lines, rather than refreshing all word lines uniformly. The refresh control circuit identifies target word lines based on active signal detection and performs refresh only on those susceptible to Row Hammering effect, thereby reducing overall power consumption while maintaining data retention reliability.
2Reliability
If refresh operations are performed more frequently, then data loss due to Row Hammering is prevented, but productivity decreases due to increased refresh overhead
Solution Approach 1:
The patent implements preliminary action by detecting active signals on word lines and proactively identifying target word lines that require refresh before data loss occurs. The refresh control circuit counts active signals and generates row hammering activating signals in advance, allowing refresh operations to be performed preemptively on susceptible word lines during idle periods, thus preventing data loss without continuously interfering with normal memory operations.
Solution Approach 2:
The patent applies dynamics by making the refresh operation frequency and target selection adaptive rather than fixed. The refresh control circuit dynamically adjusts which word lines receive refresh operations based on real-time detection of active signals and generated row hammering activating signals. This dynamic approach ensures refresh operations are performed only when and where needed, optimizing the balance between data retention and productivity.
3Quantity of substance
If the memory device operates at high density, then storage capacity increases, but susceptibility to Row Hammering effect increases
Solution Approach 1:
The patent implements feedback by using the refresh control circuit to continuously monitor active signals on word lines and detect patterns indicative of Row Hammering effect. The circuit counts active signals, generates row hammering activating signals based on detected patterns, and uses this feedback information to selectively trigger refresh operations on affected word lines, thereby counteracting the increased susceptibility to Row Hammering in high-density memory devices.
Data Source
AI summary
A semiconductor memory device may include: a memory cell region including a plurality of memory cells coupled between a plurality of word lines and a plurality of bit lines; and a refresh control block suitable for performing a first refresh operation onto the plurality of the word lines in response to a refresh signal, counting the number of active signals that are inputted between at least two neighboring refresh signals and when the counted number of the active signals is equal to or greater than a reference number, performing a second refresh operation onto a word line corresponding to a target address.