Refresh Address Counter Using Self-Oscillation for DDR5 Refresh Modes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing refresh methods for DDR5 SDRAM are not compatible with both all-bank and same-bank refresh commands, necessitating a unified counting circuit that can handle the different refresh requirements of DDR5.
Innovation Solution
A refresh address counting circuit comprising a self-oscillating clock generation circuit, a self-oscillating mask circuit, and a refresh address counter, which generates and masks clock signals based on bank activation signals to count refresh addresses effectively for both all-bank and same-bank commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate counting circuits are used for all-bank refresh and same-bank refresh commands, then each refresh type can be handled with dedicated optimization, but the overall device complexity increases and a unified solution is lacking
Solution Approach 1:
The patent implements a unified refresh address counting circuit that can handle both all-bank refresh commands and same-bank refresh commands through a single device. The circuit uses a configurable counter structure with control logic that adapts its counting behavior based on the refresh command type, eliminating the need for separate dedicated circuits for each refresh mode while maintaining full functionality for both command types.
2Adaptability or versatility
If a unified refresh counting circuit is implemented to handle both all-bank and same-bank refresh commands, then adaptability improves, but the counting precision and accuracy for specific refresh modes may be compromised
Solution Approach 1:
The patent employs dynamic control logic that adjusts the counter's operating parameters based on the detected refresh command type. When an all-bank refresh command is detected, the counter configures itself for bank-wide addressing; when a same-bank refresh command is detected, it reconfigures for specific bank addressing. This dynamic reconfiguration ensures counting accuracy is maintained for each specific refresh mode while preserving unified circuit architecture.
Data Source
AI summary
A refresh address counting circuit, a refresh address counting method, and a refresh address read-write circuit are provided. The refresh address counting circuit includes: a self-oscillation clock generation circuit, configured to generate, in each of refresh cycles, a self-oscillation clock signal based on at least one array activation signal upon acquiring a refresh signal; a self-oscillation mask circuit, configured to generate a self-oscillation mask signal under a preset refresh command; and a refresh address counter, configured to counting a refresh address based on the self-oscillation clock signal and the self-oscillation mask signal and to output a self-oscillation refresh address.