Region Based Device Bypass Circuit Simulation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional circuit simulation methods, such as SPICE, face challenges in efficiently handling large matrices associated with nanometer-scale integrated circuits, leading to increased computational costs and limitations in simulating full chip designs due to exponential growth in matrix size and complexity.
Innovation Solution
Implementing a region-based device bypass method that determines node tolerance for each device in a subcircuit, allowing for the skipping of model evaluation for devices in a bypass region, thereby reducing computational resources required and improving simulation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If detailed circuit simulation and transistor-level simulation are used to analyze nanometer effects, then measurement precision and reliability are improved, but device complexity and computational cost increase exponentially
Solution Approach 1:
The patent divides the integrated circuit into multiple regions based on device activity levels. Active regions containing dynamically switching devices are simulated in detail, while inactive regions with static devices are bypassed. This segmentation allows the simulation to focus computational resources on critical areas, maintaining measurement precision for nanometer effects where they matter while avoiding exponential complexity growth in inactive areas.
Solution Approach 2:
The patent applies different simulation qualities to different parts of the circuit. In active regions where devices are switching, full detailed simulation is performed to capture nanometer effects accurately. In inactive regions where devices remain static, the simulation uses a bypass approach with reduced computational effort. This local quality differentiation maintains simulation accuracy where needed while reducing overall device complexity.
2Measurement precision
If full chip design simulation is performed using conventional SPICE methods, then measurement precision is maintained, but productivity and simulation speed deteriorate due to exponential matrix growth
Solution Approach 1:
The patent segments the full chip into active and inactive regions, allowing separate handling of simulation tasks. Only active regions requiring detailed analysis are simulated with full precision, while inactive regions are bypassed. This segmentation enables full chip design simulation to proceed at practical speeds while maintaining measurement precision in the regions that require it.
Solution Approach 2:
The patent applies partial action by performing detailed simulation only on active regions rather than the entire chip. The bypass mechanism selectively applies full simulation effort only where necessary, achieving sufficient measurement precision for nanometer effects in critical areas while dramatically improving productivity by avoiding redundant computation in inactive regions.
3Measurement precision
If model evaluation is performed for all devices in every time step, then measurement precision is improved, but productivity decreases due to unnecessary computations in inactive regions
Solution Approach 1:
The patent introduces dynamic region identification that adapts to the current simulation state. Devices are monitored to detect transitions between active and inactive states, and the bypass mechanism dynamically adjusts which regions receive detailed model evaluation. This dynamics allows measurement precision to be maintained during active switching events while improving productivity by bypassing computations during static periods.
Solution Approach 2:
The patent implements skipping by bypassing model evaluation for devices in inactive regions. When devices are detected to be in static states, the simulation skips detailed model evaluation for those devices and their associated regions, rushing through these areas with simplified handling. This skipping eliminates unnecessary computations that would degrade productivity while preserving measurement precision in active regions where detailed evaluation is performed.
Data Source
AI summary
Methods and systems are disclosed related to region based device bypass in circuit simulation. In one embodiment, a computer implemented method of performing region based device bypass in circuit simulation includes receiving a subcircuit for simulation, where the subcircuit includes a plurality of devices, and determining node tolerance of the plurality of devices. The computer implemented method further comprises for each device in the plurality of devices, determining whether the device has entered into a bypass region using the node tolerance of the plurality of devices, performing model evaluation in response to the device has not entered the bypass region, and skipping model evaluation in response to the device has entered the bypass region.