Regional Voltage and Clock Control for Programmable Logic Timing

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Solution Overview

Problem

Integrated circuits with programmable logic face challenges in identifying optimal operating voltages and clock frequencies due to design variability, leading to increased power consumption and heat generation, which affects performance and longevity.

Innovation Solution

The integration of a control unit, non-volatile memory, and random-access memory in each region of the integrated circuit to store target voltage values and criticality values based on design-specific propagation times, allowing for dynamic voltage adjustment and clock compensation to maintain target speeds while reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed operating voltage is used across all regions of the integrated circuit, then the circuit can operate reliably, but power consumption increases and heat generation worsens

Engineering Contradiction:
Improveoperational reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The integrated circuit is divided into multiple regions, each with independent voltage control. Each region has its own voltage regulator and control logic that can independently adjust voltage based on the specific design programmed in that region, allowing low-voltage operation for non-critical regions while maintaining higher voltage for critical regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each region of the integrated circuit is treated with local quality control, where voltage levels are customized according to the specific design requirements of each region. The control unit analyzes the programmed design and applies appropriate voltage levels locally, rather than using a uniform voltage across the entire circuit.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If voltage is reduced to lower power consumption, then energy efficiency improves, but clock frequency decreases affecting performance

Engineering Contradiction:
Improvepower consumptionVSAvoidclock frequency
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The voltage and clock frequency are dynamically adjusted based on the specific design programmed in each region. The control unit analyzes propagation delays and critical paths, then dynamically sets voltage and clock levels to match the actual performance requirements, avoiding both over-provisioning and under-provisioning.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operating parameters (voltage and clock frequency) based on measured propagation delays and design characteristics. By measuring actual signal propagation times and adjusting voltage and clock levels accordingly, the system optimizes the balance between power consumption and performance for each specific design.

Inventive Principle:
Principle #35Parameter changes

3Speed

If higher voltage is supplied to ensure target speed, then clock frequency is sufficient, but power consumption and heat generation increase

Engineering Contradiction:
Improveclock frequencyVSAvoidpower consumption
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The control unit performs preliminary analysis of the programmed design to identify critical paths and estimate required performance levels. Based on this preliminary assessment, the system pre-configures appropriate voltage and clock levels before operation begins, avoiding the need to over-provision voltage for all regions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system measures actual signal propagation delays and uses this feedback to adjust voltage and clock frequency settings. The control unit monitors performance and dynamically adjusts parameters to achieve target speeds with minimum necessary power consumption.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3422143B1Regional design-dependent voltage control and clocking
Publication Date: 2022.09.14 INTEL CORP
  • EP3422143B1 patent drawingFigure 1
  • EP3422143B1 patent drawingFigure 2
  • EP3422143B1 patent drawingFigure 3

AI summary

An integrated circuit include multiple regions, wherein at least one region includes a control circuit. The control circuit receives a target voltage value to supply to the region that enables the region to operate at a target speed. The control circuit also receives a first criticality value of a first path of a design programmed in the region. The first criticality value is based on a first propagation time of the first path and a first allowable time to traverse the first path while enabling the region to operate at the target speed. The control circuit further instructs a power regulator to supply voltage to the region based at least in part on the target voltage value and the first criticality value. The integrated circuit also includes the power regulator communicatively coupled to the at least one region. The power regulator supplies power to the at least one region.