Register Bank Scan Chain for SEU Detection and Restoration
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Solution Overview
Problem
Existing register banks in electronic devices face challenges in detecting and mitigating Single Event Upsets (SEUs), which can lead to unintended changes in parameters, affecting the reliability and safety of safety-critical systems, particularly in automotive and similar applications where high diagnostic coverage is required.
Innovation Solution
A register bank apparatus with a scan chain arrangement for sequential output and feedback of parameters, combined with a checksum determination element to identify changes, allows for the detection of SEUs and restoration of original parameter values, and communicates changes to a hypervisor for corrective action.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional register banks are used without error detection mechanisms, then device complexity is reduced, but reliability deteriorates due to undetected SEUs
Solution Approach 1:
The patent implements a feedback mechanism where the checksum determination element continuously monitors register contents and feeds back integrity status to the hypervisor. The scan chain arrangement also provides feedback by shifting register contents back to their original positions after verification, enabling continuous reliability monitoring without significant complexity increase.
Solution Approach 2:
The patent introduces a checksum determination element as an intermediary component that mediates between the register bank and the hypervisor. This element calculates checksums of register contents and compares them against stored values, serving as a dedicated error detection intermediary that isolates the complexity from both the register bank and the hypervisor.
2Reliability
If checksum verification is performed continuously, then diagnostic coverage improves, but use of energy increases
Solution Approach 1:
The patent implements periodic checksum verification rather than continuous monitoring. The integrity checking is performed at scheduled intervals or at specific system states (e.g., after certain operations), allowing the system to maintain high diagnostic coverage while consuming energy only during verification periods rather than continuously.
3Manufacturing precision
If scan chain arrangement is used for sequential output, then manufacturing precision improves through better testing capability, but device complexity increases
Solution Approach 1:
The scan chain arrangement is designed to serve multiple functions: it enables sequential output of register contents for checksum verification, provides feedback by shifting contents back to original positions, and facilitates both manufacturing testing and operational integrity checking. This multi-functionality reduces the need for separate dedicated testing structures.
4Reliability
If feedback arrangement is implemented for parameter restoration, then reliability improves, but device complexity increases
Solution Approach 1:
The feedback arrangement is merged with the scan chain arrangement, using the same sequential shifting mechanism for both outputting register contents to checksum elements and restoring them back to original positions. This consolidation reduces overall device complexity by combining multiple functions into a single integrated structure rather than implementing separate feedback pathways.
Data Source
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AI summary
An apparatus comprising: a register bank comprising one or more chains of registers comprising a plurality of serially connected registers for storing parameters, the chain of registers each having an input node and an output node, the register bank including a scan chain arrangement configured to provide for sequential output of the parameters stored in the registers of the chain by sequentially shifting the parameters to an adjacent register in the chain in a direction of the output node; a feedback arrangement to feed back the output parameters to the input node to restore the parameters to their appropriate position in the chain; and a checksum determination element configured to calculate a checksum of the parameters for identification of changes to the parameters of the at least one chain of registers.