Register File Spilling via Communication Cost Analysis
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Solution Overview
Problem
In digital signal processors, insufficient registers lead to 'spilling' where live ranges are stored in external memory, resulting in high communication costs and decreased processor performance.
Innovation Solution
A spilling method for register files in a Very Long Instruction Word (VLIW) digital signal processor with Parallel Architecture Core (PAC) that calculates and utilizes weighted costs to select the most efficient local or global register file over memory for storing spilled live ranges, reducing communication costs and increasing processor efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If live ranges are stored in external memory when spilling occurs, then register allocation is simplified, but communication cost increases and processor performance decreases
Solution Approach 1:
The patent introduces local register files as intermediary storage between the computation units and external memory. When spilling occurs, live ranges are stored in these local register files instead of directly in external memory, reducing communication cost while maintaining simplified register allocation through the use ratio metric.
Solution Approach 2:
The patent adds a new dimension to register allocation by introducing multiple types of storage locations (local register files and external memory) with different communication costs. The use ratio metric provides an additional dimension for decision-making, allowing the system to balance between communication cost and storage availability.
2Productivity
If more registers are provided to avoid spilling, then processor performance improves, but hardware complexity and cost increase
Solution Approach 1:
The patent implements dynamic register allocation where the allocation strategy adapts based on the use ratio metric and communication cost calculations. Instead of providing fixed additional registers, the system dynamically decides whether to allocate existing registers or spill to local register files based on real-time metrics, avoiding unnecessary hardware complexity.
Solution Approach 2:
The patent changes the parameter space by introducing communication cost and use ratio as new parameters for register allocation decisions. This allows the system to optimize processor performance by considering multiple factors rather than simply increasing register count, thereby avoiding proportional increases in hardware complexity.
3Loss of energy
If local register files are used for spilling, then communication cost decreases, but register file availability and management complexity increase
Solution Approach 1:
The patent implements feedback through the use ratio metric, which continuously monitors register file usage and feeds this information back to the register allocation algorithm. This feedback mechanism enables automatic adaptation to changing conditions, reducing the need for complex manual management while optimizing communication cost by selecting appropriate local register files for spilling.
Data Source
AI summary
A spilling method in register files for a processor is proposed. The processor with Parallel Architecture Core structure includes multiple clusters and a memory. Each cluster includes multiple function units (M-Unit and I-Unit), multiple local register files and a global register file. The local register files are used by the multiple function units, respectively. For a specified live range, the method includes calculating communication costs of the local register files and the global register file in each cluster, and communication cost of the memory for spilling the live range when spilling occurs; calculating use ratios of the local register files and the global register file in each cluster, and use ratio of the memory for the live range; and selecting one of the local register files and the global register file in each cluster and the memory for spilling the live range based on the communication costs and use ratios.