Register Map Table Narrow Value Storage for Out-of-Order Processor

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Solution Overview

Problem

Out-of-order processors face challenges in managing physical register file (PRF) pressure and performance due to the need for larger PRFs to accommodate more instructions, which increases access time, area, cost, and power consumption.

Innovation Solution

Storing narrow produced values directly in a register map table (RMT) instead of the physical register file (PRF), reducing the need for additional ports and allowing for more efficient access and write-back operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the physical register file (PRF) is made larger to accommodate more instructions for out-of-order execution, then the instruction window size and performance are improved, but the access time increases and power consumption increases

Engineering Contradiction:

Improveinstruction execution throughputVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent segments the register storage function by separating narrow produced values (stored in RMT) from full-width produced values (stored in PRF). This segmentation allows the system to maintain a smaller PRF while still supporting a large instruction window, thereby reducing power consumption while preserving productivity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by using different storage locations for different types of data: the RMT stores narrow produced values that are frequently accessed, while the PRF stores full-width values. This localized optimization reduces the overall PRF size and associated power consumption without impacting performance.

Inventive Principle:

Principle #3Local quality

2Productivity

If the physical register file (PRF) is made larger to accommodate more instructions, then the instruction window size is increased, but the area and cost increase

Engineering Contradiction:

Improveinstruction window sizeVSAvoidregister file area

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

By segmenting the storage architecture into RMT and PRF, the patent enables the system to support a large instruction window without proportionally increasing PRF area. The RMT handles narrow values, allowing the PRF to be smaller while maintaining the same instruction window capacity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent creates a copy of narrow produced values in the RMT, which serves as a compact representation. This copying mechanism allows the system to maintain references to these values without allocating full-width PRF entries, thereby reducing area while preserving functionality.

Inventive Principle:

Principle #26Copying

3Productivity

If the physical register file (PRF) is made larger to accommodate more instructions, then the instruction window size is increased, but the access time increases

Engineering Contradiction:

Improveinstruction window sizeVSAvoidregister access time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary action by storing narrow produced values in the RMT immediately when they are produced. This pre-positioning of data in a easily accessible location (RMT) ensures that subsequent accesses to these values are fast, offsetting the increased access time that would result from a larger PRF.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The RMT acts as an intermediary between the execution units and the PRF for narrow produced values. This intermediary structure provides fast access to frequently used narrow values, reducing the overall access time penalty associated with maintaining a larger instruction window in the PRF.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Productivity

If more read ports are added to the physical register file (PRF) to increase pipeline width, then the instruction processing throughput is improved, but the area and port pressure increase

Engineering Contradiction:

Improvepipeline widthVSAvoidregister file area

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent extracts the read port pressure from the PRF by implementing the RMT. Narrow produced values are read from the RMT rather than the PRF, which removes a significant portion of the read traffic from the PRF. This extraction allows the system to achieve high pipeline width without adding proportional numbers of PRF ports, thereby reducing area.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS10108417B2Storing narrow produced values for instruction operands directly in a register map in an out-of-order processor

Publication Date: 2018.10.23 QUALCOMM INC

AI summary

Storing narrow produced values for instruction operands directly in a register map in an out-of-order processor (OoP) is provided. An OoP is provided that includes an instruction processing system. The instruction processing system includes a number of instruction processing stages configured to pipeline the processing and execution of instructions according to a dataflow execution. The instruction processing system also includes a register map table (RMT) configured to store address pointers mapping logical registers to physical registers in a physical register file (PRF) for storing produced data for use by consumer instructions without overwriting logical registers for later executed, out-of-order instructions. In certain aspects, the instruction processing system is configured to write back (i.e., store) narrow values produced by executed instructions directly into the RMT, as opposed to writing the narrow produced values into the PRF in a write back stage.