Register Memory Scrubbing for Radiation-Tolerant Fault Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor-based digital data registers are vulnerable to radiation-induced errors, such as single event upsets (SEUs), which can cause data integrity issues and system failures, especially in high-radiation environments like space applications, and existing fault-tolerant techniques like TMR are inadequate for correcting multiple errors.
Innovation Solution
A scrubbing technique is employed within the memory device to refresh the state of digital storage circuits using the majority output of a voter, clocking it back into the registers during non-functional cycles, thereby correcting errors and maintaining data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TMR (triple modular redundancy) is used for fault tolerance, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent merges the fault-tolerance function with the existing register structure by integrating three storage circuits into a single register unit. The voter logic is combined with the register outputs, and the scrubbing function is integrated into the clocking mechanism, allowing fault tolerance without adding separate complex subsystems.
Solution Approach 2:
The register structure serves multiple functions: normal data storage, fault detection through voting, and self-correction via scrubbing. The same clock signal serves both functional operation and scrubbing operations, eliminating the need for separate control mechanisms.
2Reliability
If scrubbing operations are performed frequently, then data integrity is improved, but use of energy increases
Solution Approach 1:
The scrubbing operation is performed periodically during non-functional clock cycles rather than continuously. The multiplexer switches to scrubbing mode only when the functional enable signal is inactive, energy-efficient periodic scrubbing at intervals that maintain data integrity without continuous energy expenditure.
Data Source
AI summary
A memory device includes at least three digital storage circuits arranged in parallel, the digital storage circuits each configured to store state data representing a bit of data in a first or second state; a data input configured to receive input data, the input data representing a bit of data in the first or second state; a voter having a voter output, the voter configured to generate output data at the voter output, the output data representing which of the first and second state are in a majority among the state data stored in each of the digital storage circuits; and a multiplexer operatively coupled to the data input, the voter output, and an input of each of the digital storage circuits, the multiplexer configured to output, to each of the digital storage circuits, one of the input data and the output data based on a functional enable signal.