Register-Provided Opcode Instruction Encoding
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Solution Overview
Problem
Existing instruction set architectures face limitations in encoding opcode bits, restricting the range of data processing operations that can be supported, often requiring multiple instructions for complex operations and increasing circuit area and power consumption.
Innovation Solution
The introduction of register-provided-opcode (RPO) instructions, where part of the opcode is stored in a source register, allowing additional opcode bits to be used, enabling a wider range of data processing operations within a single instruction encoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional instruction encoding is used with fixed opcode bits, then the instruction format remains simple and compact, but the range of supported data processing operations is limited
Solution Approach 1:
The opcode is segmented into two parts: fixed opcode bits in the instruction encoding and variable opcode bits stored in a source register. This segmentation allows the instruction format to remain simple while enabling a wider range of operations through the register-stored opcode portion.
Solution Approach 2:
The patent extends the opcode space from a single-dimension fixed field in the instruction encoding to a two-dimensional structure combining fixed instruction bits and variable register bits. This dimensional expansion dramatically increases the number of supported operations without increasing instruction length.
2Adaptability or versatility
If multiple instructions are used to support complex data processing operations, then the range of operations increases, but the circuit area and power consumption increase
Solution Approach 1:
A single instruction encoding serves multiple functions by combining fixed opcode bits with variable register-stored opcode bits. This universal instruction format can represent both simple and complex operations without requiring separate dedicated instructions for each operation type.
Solution Approach 2:
The effective opcode parameters are changed dynamically by storing different opcode values in the source register. This allows the same instruction encoding to perform different operations by changing the register content, reducing the need for multiple fixed instructions and their associated circuitry.
3Adaptability or versatility
If instruction length is increased to accommodate more opcode bits, then more data processing operations can be encoded, but the instruction decoding complexity and processing time increase
Solution Approach 1:
The source register that already must be accessed to obtain the operand also provides the additional opcode bits. This self-service approach means no additional memory access or instruction fetch is required to obtain the opcode, eliminating the time penalty that would normally accompany longer instructions.
Solution Approach 2:
The operand retrieval and opcode retrieval processes are merged into a single operation. By storing the opcode in the same register as the operand, the system eliminates redundant access operations and reduces decoding time while maintaining extended opcode capability.
Data Source
AI summary
Instructions have an opcode and at least one data operand, the opcode identifying a data processing operation to perform on the at least one data operand. For a register-provided-opcode instruction specifying at least one source register, at least part of the opcode is a register-provided opcode represented by a first portion of data stored in said at least one source register of the register-provided-opcode instruction, and the at least one data operand comprises data represented by a second portion of the data stored in the at least one source register. The register-provided opcode is used to select between different data processing operations supported for the same instruction encoding of the register-provided-opcode instruction.