Register Reorganisation via Dynamic Mapping for Execution Unit Access
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Solution Overview
Problem
In matrix processors with a large number of execution units, providing a complete set of connections between registers and execution units is impractical due to area and power consumption concerns, leading to inefficient use of execution units and potential micro-operation splitting during calculations.
Innovation Solution
Implementing an incomplete set of connections between physical registers and execution units, with register reorganisation circuitry that monitors upcoming operations to adjust the mapping between logical and physical registers, optimizing connections for specific workloads and preventing micro-operation splitting by remapping logical registers to better utilize available execution units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a complete set of connections between physical registers and execution units is provided, then all execution units can access all registers, but the area and power consumption become impractical
Solution Approach 1:
The connection set is segmented into multiple subsets, where each physical register is connected to only a subset of execution units rather than all execution units. This segmentation reduces the total number of connections while maintaining functional capability through dynamic remapping.
Solution Approach 2:
The system dynamically reorganizes the mapping between logical and physical registers based on upcoming operations and current connection availability. This dynamic remapping allows the incomplete connection set to adapt to different computational needs, effectively providing full access capability when needed.
2Adaptability or versatility
If a complete set of connections between physical registers and execution units is provided, then all execution units can access all registers, but power consumption becomes impractical
Solution Approach 1:
The connection set is segmented into multiple subsets, where each physical register is connected to only a subset of execution units rather than all execution units. This segmentation reduces the total number of connections while maintaining functional capability through dynamic remapping.
Solution Approach 2:
The system dynamically reorganizes the mapping between logical and physical registers based on upcoming operations and current connection availability. This dynamic remapping allows the incomplete connection set to adapt to different computational needs, effectively providing full access capability when needed.
3Area of stationary object
If an incomplete set of connections is provided between physical registers and execution units, then area and power consumption are reduced, but execution unit utilization becomes inefficient
Solution Approach 1:
The system dynamically reorganizes the mapping between logical and physical registers based on upcoming operations and current connection availability. This dynamic remapping allows the incomplete connection set to adapt to different computational needs, ensuring high execution unit utilization by optimizing which physical registers are mapped to which logical registers before each operation.
Solution Approach 2:
The register reorganisation circuitry monitors upcoming operations in advance and performs remapping before the operations execute. This preliminary action ensures that the optimal mapping is established beforehand, maximizing execution unit utilization without requiring complete connections.
4Use of energy by stationary object
If an incomplete set of connections is provided between physical registers and execution units, then power consumption is reduced, but micro-operation splitting occurs
Solution Approach 1:
The system dynamically reorganizes the mapping between logical and physical registers based on upcoming operations and current connection availability. This dynamic remapping allows the incomplete connection set to adapt to different computational needs, effectively providing full access capability when needed.
Solution Approach 2:
The register reorganisation circuitry monitors upcoming operations in advance and performs remapping before the operations execute. This preliminary action ensures that the optimal mapping is established beforehand, maximizing execution unit utilization without requiring complete connections.
Data Source
AI summary
An apparatus has processing circuitry with execution units to perform operations, physical registers to store data, and forwarding circuitry to forward the data from the physical registers to the execution units. The forwarding circuitry provides an incomplete set of connections between the physical registers and the execution units such that, for each of at least some of the physical registers, the physical register is connected to only a subset of the execution units. The apparatus also has register renaming circuitry to map logical registers identified by the operations to respective physical registers and register reorganisation circuitry to monitor upcoming operations and to determine, based on the upcoming operations and the connections provided by the forwarding circuitry, whether to perform a register reorganisation procedure to change a mapping between the logical registers and the physical registers. The register reorganisation circuitry is also configured to perform the register reorganisation procedure.


