Register Restoring Branch Instruction for Atomic State Update
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Solution Overview
Problem
In data processing, restoring the state of all registers, especially when branching from an exception handling routine, is challenging when the target program address is stored in a register, as it interferes with storing intermediate data, and loading values from memory requires register usage, making complete state restoration difficult.
Innovation Solution
A register restoring branch instruction that checks the validity of the target program address and data value, branching and updating the architectural register atomically, with error actions like pipeline flush or NOOP if invalid, and using validity indicators to ensure accurate restoration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a register is used to store a target program address for branching, then the branch operation can be performed, but the register cannot simultaneously store intermediate data needed for process state restoration
Solution Approach 1:
The patent combines two separate operations (branching and register state restoration) into a single atomic instruction. The branch instruction simultaneously updates the program counter with the target address and restores the architectural register with the data value, eliminating the need to choose between storing target address or intermediate data in the same register.
Solution Approach 2:
The patent separates the target program address storage and data value storage into different registers (target register and value register), allowing both to be preserved and validated independently before the atomic update operation.
2Ease of operation
If loading values from memory into registers is performed, then data can be restored, but a register is required to store the memory location, preventing complete state restoration
Solution Approach 1:
The patent extracts the memory location storage requirement from the architectural register by using a separate target register to hold the target program address. This allows the architectural register to be freely updated with restored values without being constrained by needing to retain memory location information.
3Reliability
If validity checking is performed on target program address and data value, then accurate restoration can be ensured, but additional validation steps are required
Solution Approach 1:
The patent combines validity checking, branching, and register updating into a single atomic instruction operation. The validity indicators are checked as part of the instruction execution itself, not as separate preliminary steps, thereby ensuring reliability without significantly increasing operational complexity.
Data Source
AI summary
There is provided an apparatus that includes processing circuitry for performing processing operations specified by program instructions and a target register that stores a target program address. A value register stores a data value. There is also provided an architectural register and an instruction decoder that decodes the program instructions to generate control signals to control the processing circuitry to perform the processing operations. The instruction decoder includes branch instruction decoding circuitry that decodes a register restoring branch instruction to cause the processing circuitry to determine whether the target program address and the data value are valid. If the target program address and the data value are both valid then the processing circuitry is caused to branch to the target program address and update the architectural register to store the data value. Otherwise an error action is taken.